diff options
| author | Simon Glass <sjg@chromium.org> | 2015-10-18 21:55:33 (GMT) |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-10-21 13:46:50 (GMT) |
| commit | 9fbc5ccd79d1c6faacd2027ca89e54f38f365e2e (patch) | |
| tree | af6a4b5d91ef506aceb1a005053957486ba56d10 /arch | |
| parent | 53327d3e61ee9917eab9ce1657f20f17a079c130 (diff) | |
| download | u-boot-fsl-qoriq-9fbc5ccd79d1c6faacd2027ca89e54f38f365e2e.tar.xz | |
x86: ivybridge: Check the RTC return value
The RTC can fail, so check the return value for reads.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/cpu/ivybridge/sdram.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c index 26e2e5b..e637909 100644 --- a/arch/x86/cpu/ivybridge/sdram.c +++ b/arch/x86/cpu/ivybridge/sdram.c @@ -107,11 +107,18 @@ static int read_seed_from_cmos(struct pei_data *pei_data) * the flash too much. So we store these in CMOS and the large MRC * data in SPI flash. */ - rtc_read32(dev, CMOS_OFFSET_MRC_SEED, &pei_data->scrambler_seed); + ret = rtc_read32(dev, CMOS_OFFSET_MRC_SEED, &pei_data->scrambler_seed); + if (!ret) { + ret = rtc_read32(dev, CMOS_OFFSET_MRC_SEED_S3, + &pei_data->scrambler_seed_s3); + } + if (ret) { + debug("Failed to read from RTC %s\n", dev->name); + return ret; + } + debug("Read scrambler seed 0x%08x from CMOS 0x%02x\n", pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED); - - rtc_read32(dev, CMOS_OFFSET_MRC_SEED_S3, &pei_data->scrambler_seed_s3); debug("Read S3 scrambler seed 0x%08x from CMOS 0x%02x\n", pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3); |