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| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2017-07-03 10:37:11 (GMT) |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-08-09 16:57:32 (GMT) |
| commit | bf7aecce04f0b29126b870c6d1e926bd26a681e8 (patch) | |
| tree | a695a2c27318a57c342f3683b92e4fbdf01854db /arch | |
| parent | 263536a693b3c3260f88b5e47a1d3e4962d66ba7 (diff) | |
| download | u-boot-fsl-qoriq-bf7aecce04f0b29126b870c6d1e926bd26a681e8.tar.xz | |
armv8/fsl-lsch2: correct the config description of DSPI clock divider
It is derived from Platform clock instead of Platform PLL frequency.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 5825f9b..43b869f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -307,7 +307,7 @@ config SYS_FSL_DSPI_CLK_DIV default 2 help This is the divider that is used to derive DSPI clock from Platform - PLL, in another word DSPI_clk = Platform_PLL_freq / this_divider. + clock, in another word DSPI_clk = Platform_clk / this_divider. config SYS_FSL_DUART_CLK_DIV int "DUART clock divider" |