diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2017-07-28 17:02:15 (GMT) |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2017-08-01 12:17:02 (GMT) |
| commit | c3df28f6e2fc7299883f3340475c532f18754585 (patch) | |
| tree | fb8bbe43822bd58364739786ee39ceeb3a49fc05 /arch | |
| parent | 167a40166bb116a19d23c946b6394636da34f3cf (diff) | |
| download | u-boot-fsl-qoriq-c3df28f6e2fc7299883f3340475c532f18754585.tar.xz | |
x86: Make table address selectable
Some firmwares might have another window for generated tables.
So, introduce two configuration options to select start address and
maximum length for the generated tables.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/Kconfig | 13 | ||||
| -rw-r--r-- | arch/x86/include/asm/tables.h | 9 |
2 files changed, 15 insertions, 7 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5c8dc82..c26710b 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -542,6 +542,19 @@ config VGA_BIOS_ADDR address of 0xfff90000 indicates that the image will be put at offset 0x90000 from the beginning of a 1MB flash device. +config ROM_TABLE_ADDR + hex + default 0xf0000 + help + All x86 tables happen to like the address range from 0x0f0000 + to 0x100000. We use 0xf0000 as the starting address to store + those tables, including PIRQ routing table, Multi-Processor + table and ACPI table. + +config ROM_TABLE_SIZE + hex + default 0x10000 + menu "System tables" depends on !EFI && !SYS_COREBOOT diff --git a/arch/x86/include/asm/tables.h b/arch/x86/include/asm/tables.h index 9e8208b..c784a2a 100644 --- a/arch/x86/include/asm/tables.h +++ b/arch/x86/include/asm/tables.h @@ -9,13 +9,8 @@ #include <tables_csum.h> -/* - * All x86 tables happen to like the address range from 0xf0000 to 0x100000. - * We use 0xf0000 as the starting address to store those tables, including - * PIRQ routing table, Multi-Processor table and ACPI table. - */ -#define ROM_TABLE_ADDR 0xf0000 -#define ROM_TABLE_END 0xfffff +#define ROM_TABLE_ADDR CONFIG_ROM_TABLE_ADDR +#define ROM_TABLE_END (CONFIG_ROM_TABLE_ADDR + CONFIG_ROM_TABLE_SIZE - 1) #define ROM_TABLE_ALIGN 1024 |