diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-09-02 01:40:28 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-09-02 15:33:17 (GMT) |
| commit | eb5d1dc7a64957f8a81347a8237fd60460da25cb (patch) | |
| tree | 5b5652e780e5e433f562f5a9ab605a3f498d30e3 /arch | |
| parent | 0e030593962d15aece45b2fa0401ee27d0d7ab96 (diff) | |
| download | u-boot-fsl-qoriq-eb5d1dc7a64957f8a81347a8237fd60460da25cb.tar.xz | |
powerpc: ppc4xx: remove zeus support
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/Kconfig | 4 | ||||
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/start.S | 15 |
2 files changed, 0 insertions, 19 deletions
diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig index 16c049e..23ecc89 100644 --- a/arch/powerpc/cpu/ppc4xx/Kconfig +++ b/arch/powerpc/cpu/ppc4xx/Kconfig @@ -11,9 +11,6 @@ choice config TARGET_T3CORP bool "Support t3corp" -config TARGET_ZEUS - bool "Support zeus" - config TARGET_ACADIA bool "Support acadia" @@ -176,6 +173,5 @@ source "board/xes/xpedite1000/Kconfig" source "board/xilinx/ml507/Kconfig" source "board/xilinx/ppc405-generic/Kconfig" source "board/xilinx/ppc440-generic/Kconfig" -source "board/zeus/Kconfig" endmenu diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index 7a0f0d2..77d4040 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -1805,21 +1805,6 @@ ppc405ep_init: bne _pci_66mhz #endif /* CONFIG_TAIHU */ -#if defined(CONFIG_ZEUS) - mfdcr r4, CPC0_BOOT - andi. r5, r4, CPC0_BOOT_SEP@l - bne strap_1 /* serial eeprom present */ - lis r3,0x0000 - addi r3,r3,0x3030 - lis r4,0x8042 - addi r4,r4,0x223e - b 1f -strap_1: - mfdcr r3, CPC0_PLLMR0 - mfdcr r4, CPC0_PLLMR1 - b 1f -#endif - addis r3,0,PLLMR0_DEFAULT@h /* PLLMR0 default value */ ori r3,r3,PLLMR0_DEFAULT@l /* */ addis r4,0,PLLMR1_DEFAULT@h /* PLLMR1 default value */ |