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authorStefan Roese <sr@denx.de>2010-09-12 04:21:37 (GMT)
committerStefan Roese <sr@denx.de>2010-09-23 07:02:05 (GMT)
commitafabb498b749b48ca3ee7e833fe1501e2d6993cb (patch)
treea5e131d0d7f62e41bd9bc1c767452b43b75bf82e /board/amcc/ocotea
parent5e7abce99163a00b8d267cc8045f06b498728288 (diff)
downloadu-boot-fsl-qoriq-afabb498b749b48ca3ee7e833fe1501e2d6993cb.tar.xz
ppc4xx: Big header cleanup part 2, mostly PPC405 related
This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. As a part from this cleanup, the GPIO definitions for PPC405EP are corrected. The high and low parts of the registers (for example CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in the wrong order. This patch now fixes this issue by switching these xxxH and xxxL values. This brings the GPIO 405EP port in sync with all other PPC4xx ports. Signed-off-by: Stefan Roese <sr@denx.de>
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