diff options
| author | Stefan Roese <sr@denx.de> | 2010-04-14 11:57:18 (GMT) |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2010-04-19 13:29:03 (GMT) |
| commit | cf6eb6da433179674571f9370566b1ec8989a41a (patch) | |
| tree | fc0ad7161d7146154026fa789a97dd2c047c61a7 /board/amcc/ocotea | |
| parent | 2a72e9ed18d2164eb7fe569119342eb631b568da (diff) | |
| download | u-boot-fsl-qoriq-cf6eb6da433179674571f9370566b1ec8989a41a.tar.xz | |
ppc4xx: TLB init file cleanup
This patch adds new macros, with frequently used combinations of the
4xx TLB access control and storage attibutes. Additionally the 4xx init.S
files are updated to make use of these new macros. Resulting in easier
to read TLB definitions.
Additionally some init.S files are updated to use the mmu header for the
TLB defines, instead of defining their own macros.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc/ocotea')
| -rw-r--r-- | board/amcc/ocotea/init.S | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/board/amcc/ocotea/init.S b/board/amcc/ocotea/init.S index e7c75df..2ef11cc 100644 --- a/board/amcc/ocotea/init.S +++ b/board/amcc/ocotea/init.S @@ -41,7 +41,7 @@ tlbtab: tlbtab_start - tlbentry(0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry(0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG) /* * TLB entries for SDRAM are not needed on this platform. @@ -49,9 +49,9 @@ tlbtab: * routine. */ - tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X) - tlbentry(CONFIG_SYS_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X) - tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_RWX) + tlbentry(CONFIG_SYS_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_RWX) + tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG) tlbtab_end |