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author | Kumar Gala <galak@kernel.crashing.org> | 2008-04-29 15:27:08 (GMT) |
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committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-04-29 16:44:29 (GMT) |
commit | 45239cf4152109caa925145ccd433529902df887 (patch) | |
tree | cbeedce4c8e289bf2da8f6a4afa3677f57578ccd /board/freescale/mpc8610hpcd | |
parent | ef7d30b14394e4c4a153118f5845760cadada02a (diff) | |
download | u-boot-fsl-qoriq-45239cf4152109caa925145ccd433529902df887.tar.xz |
85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docs
All the 85xx and 86xx UM describe the register as timing_cfg_3
not as ext_refrec.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8610hpcd')
-rw-r--r-- | board/freescale/mpc8610hpcd/mpc8610hpcd.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index d9a740e..3a855b5 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -192,7 +192,7 @@ long int fixed_sdram(void) ddr->cs0_bnds = 0x0000001f; ddr->cs0_config = 0x80010202; - ddr->ext_refrec = 0x00000000; + ddr->timing_cfg_3 = 0x00000000; ddr->timing_cfg_0 = 0x00260802; ddr->timing_cfg_1 = 0x3935d322; ddr->timing_cfg_2 = 0x14904cc8; |