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author | Peng Fan <Peng.Fan@freescale.com> | 2015-08-12 09:46:50 (GMT) |
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committer | Stefano Babic <sbabic@denx.de> | 2015-09-02 13:29:14 (GMT) |
commit | 6d97dc10a81062a787fcf5e5df7b88d1ea122a64 (patch) | |
tree | a817e1d0a39138fcaed73168422db7b83aa80eff /board/freescale/mx6slevk/mx6slevk.c | |
parent | fc684e87a1d1342cecbaf68ad8690482e4baff76 (diff) | |
download | u-boot-fsl-qoriq-6d97dc10a81062a787fcf5e5df7b88d1ea122a64.tar.xz |
imx: clock support enet2 anatop clock support
To i.MX6SX/UL, two ethernet interfaces are supported.
Add ENET2 clock support:
1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed.
To value 1, only i.MX6SX/UL can pass the check.
2. Modify board code who use this api to follow new api prototype.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nikolaos Pasaloukos <Nikolaos.Pasaloukos@imgtec.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/freescale/mx6slevk/mx6slevk.c')
-rw-r--r-- | board/freescale/mx6slevk/mx6slevk.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index 7c18c90..98e3ef0 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -279,7 +279,7 @@ static int setup_fec(void) /* clear gpr1[14], gpr1[18:17] to select anatop clock */ clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC_MASK, 0); - return enable_fec_anatop_clock(ENET_50MHZ); + return enable_fec_anatop_clock(0, ENET_50MHZ); } #endif |