diff options
| author | Simon Glass <sjg@chromium.org> | 2012-12-13 20:48:48 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-02-04 14:04:57 (GMT) |
| commit | 67ac13b1b9b6ca00893714fbc8cbf556bab6fd59 (patch) | |
| tree | 465b1934f005865689bffc75469160894bf1c361 /board/freescale/p1010rdb/ddr.c | |
| parent | c6731fe22ab1cc2f5c2b8be9b1db276d777f12c3 (diff) | |
| download | u-boot-fsl-qoriq-67ac13b1b9b6ca00893714fbc8cbf556bab6fd59.tar.xz | |
ppc: Move lbc_clk and cpu to arch_global_data
Move these fields into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Update for bsc9132qds.c, b4860qds.c]
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'board/freescale/p1010rdb/ddr.c')
| -rw-r--r-- | board/freescale/p1010rdb/ddr.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/board/freescale/p1010rdb/ddr.c b/board/freescale/p1010rdb/ddr.c index 6d00caf..49310bd 100644 --- a/board/freescale/p1010rdb/ddr.c +++ b/board/freescale/p1010rdb/ddr.c @@ -99,7 +99,7 @@ unsigned long get_sdram_size(void) struct cpu_type *cpu; phys_size_t ddr_size; - cpu = gd->cpu; + cpu = gd->arch.cpu; /* P1014 and it's derivatives support max 16it DDR width */ if (cpu->soc_ver == SVR_P1014) ddr_size = (CONFIG_SYS_DRAM_SIZE / 2); @@ -144,7 +144,7 @@ phys_size_t fixed_sdram(void) panic("Unsupported DDR data rate %s MT/s data rate\n", strmhz(buf, ddr_freq)); - cpu = gd->cpu; + cpu = gd->arch.cpu; /* P1014 and it's derivatives support max 16bit DDR width */ if (cpu->soc_ver == SVR_P1014) { ddr_cfg_regs.ddr_sdram_cfg &= ~SDRAM_CFG_DBW_MASK; @@ -237,7 +237,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, popts->trwt_override = 1; popts->trwt = 0; - cpu = gd->cpu; + cpu = gd->arch.cpu; /* P1014 and it's derivatives support max 16it DDR width */ if (cpu->soc_ver == SVR_P1014) popts->data_bus_width = DDR_DATA_BUS_WIDTH_16; |