diff options
| author | Peter Tyser <ptyser@xes-inc.com> | 2009-09-21 16:20:32 (GMT) |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-10-03 08:17:56 (GMT) |
| commit | 6385b28116f775da4771b768ba9bf93c3aaaf26e (patch) | |
| tree | efe7ab43f4b4bef802604c2d845867b2a3b96e76 /board/matrix_vision | |
| parent | cd1011db80287eef933d1599b74cff1116c93134 (diff) | |
| download | u-boot-fsl-qoriq-6385b28116f775da4771b768ba9bf93c3aaaf26e.tar.xz | |
fpga: Remove relocation fixups
PPC boards are the only users of the current FPGA code which is littered
with manual relocation fixups. Now that proper relocation is supported
for PPC boards, remove FPGA manual relocation.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Diffstat (limited to 'board/matrix_vision')
| -rw-r--r-- | board/matrix_vision/mvbc_p/fpga.c | 7 | ||||
| -rw-r--r-- | board/matrix_vision/mvblm7/fpga.c | 6 |
2 files changed, 4 insertions, 9 deletions
diff --git a/board/matrix_vision/mvbc_p/fpga.c b/board/matrix_vision/mvbc_p/fpga.c index 356af1a..3ed46fe 100644 --- a/board/matrix_vision/mvbc_p/fpga.c +++ b/board/matrix_vision/mvbc_p/fpga.c @@ -46,7 +46,6 @@ Altera_CYC2_Passive_Serial_fns altera_fns = { fpga_wr_fn, fpga_null_fn, fpga_null_fn, - 0 }; Altera_desc cyclone2 = { @@ -55,16 +54,14 @@ Altera_desc cyclone2 = { Altera_EP2C8_SIZE, (void *) &altera_fns, NULL, - 0 }; DECLARE_GLOBAL_DATA_PTR; int mvbc_p_init_fpga(void) { - fpga_debug("Initialize FPGA interface (reloc 0x%.8lx)\n", - gd->reloc_off); - fpga_init(gd->reloc_off); + fpga_debug("Initialize FPGA interface\n"); + fpga_init(); fpga_add(fpga_altera, &cyclone2); fpga_config_fn(0, 1, 0); udelay(60); diff --git a/board/matrix_vision/mvblm7/fpga.c b/board/matrix_vision/mvblm7/fpga.c index 7527d16..7b03d6f 100644 --- a/board/matrix_vision/mvblm7/fpga.c +++ b/board/matrix_vision/mvblm7/fpga.c @@ -46,7 +46,6 @@ Altera_CYC2_Passive_Serial_fns altera_fns = { fpga_wr_fn, fpga_null_fn, fpga_null_fn, - 0 }; Altera_desc cyclone2 = { @@ -62,9 +61,8 @@ DECLARE_GLOBAL_DATA_PTR; int mvblm7_init_fpga(void) { - fpga_debug("Initialize FPGA interface (reloc 0x%.8lx)\n", - gd->reloc_off); - fpga_init(gd->reloc_off); + fpga_debug("Initialize FPGA interface\n"); + fpga_init(); fpga_add(fpga_altera, &cyclone2); fpga_config_fn(0, 1, 0); udelay(60); |