PowerPC: Update MIP405/MIP405T to use Kconfig better

Convert CONFIG_MIP405T from SYS_EXTRA_OPTIONS to a real config

There are two boards, MIP405 and MIP405T that have a few differences.
Start by checking for CONFIG_TARGET_MIP405.  Then introduce
CONFIG_TARGET_MIP405T and use that not CONFIG_MIP405T.  Next, convert
also convert the usage of CONFIG_ISO_STRING to be based on Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>

3 files changed, 10 insertions, 12 deletions

diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c
index 2262175..3c110fa 100644
--- a/board/mpl/common/common_util.c
+++ b/board/mpl/common/common_util.c
@@ -20,7 +20,7 @@
 #include "../pip405/pip405.h"
 #include <asm/4xx_pci.h>
 #endif
-#ifdef CONFIG_MIP405
+#if defined(CONFIG_TARGET_MIP405) || defined(CONFIG_TARGET_MIP405T)
 #include "../mip405/mip405.h"
 #include <asm/4xx_pci.h>
 #endif
@@ -36,7 +36,8 @@ extern int mem_test(ulong start, ulong ramsize, int quiet);
 #define I2C_BACKUP_ADDR 0x7C00		/* 0x200 bytes for backup */
 #define IMAGE_SIZE CONFIG_SYS_MONITOR_LEN	/* ugly, but it works for now */
 
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405)
+#if defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) \
+	|| defined(CONFIG_TARGET_MIP405T)
 /*-----------------------------------------------------------------------
  * On PIP/MIP405 we have 3 (4) possible boot mode
  *
@@ -116,7 +117,7 @@ void setup_cs_reloc(void)
 		mtdcr(EBC0_CFGDATA, FLASH_CR_B);
 	}
 }
-#endif /* #if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) */
+#endif /* #if defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) */
 
 #ifdef CONFIG_SYS_UPDATE_FLASH_SIZE
 /* adjust flash start and protection info */
@@ -190,12 +191,11 @@ mpl_prg(uchar *src, ulong size)
 #if defined(CONFIG_PATI)
 	int start_sect;
 #endif
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) || defined(CONFIG_PATI)
+#if defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) \
+		|| defined(CONFIG_TARGET_MIP405T) || defined(CONFIG_PATI)
 	char *copystr = (char *)src;
 	ulong *magic = (ulong *)src;
-#endif
 
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) || defined(CONFIG_PATI)
 	if (uimage_to_cpu (magic[0]) != IH_MAGIC) {
 		puts("Bad Magic number\n");
 		return -1;
@@ -241,7 +241,7 @@ mpl_prg(uchar *src, ulong size)
 		return (1);
 	}
 
-#else /* #if !defined(CONFIG_PATI */
+#else /* #if !defined(CONFIG_PATI) */
 	start = FIRM_START;
 	start_sect = -1;
 
@@ -701,7 +701,7 @@ void video_get_info_str (int line_number, char *info)
 			strcpy(buf,"### No HW ID - assuming PIP405");
 		}
 #endif
-#ifdef CONFIG_MIP405
+#if defined(CONFIG_TARGET_MIP405) || defined(CONFIG_TARGET_MIP405T)
 		if (!s || strncmp (s, "MIP405", 6)) {
 			strcpy(buf,"### No HW ID - assuming MIP405");
 		}
diff --git a/board/mpl/common/common_util.h b/board/mpl/common/common_util.h
index e81ee35..22f5c2e 100644
--- a/board/mpl/common/common_util.h
+++ b/board/mpl/common/common_util.h
@@ -17,12 +17,10 @@ extern flash_info_t flash_info[];	/* info for FLASH chips */
 
 void get_backup_values(backup_t *buf);
 
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405)
 #define BOOT_MPS	0x01
 #define BOOT_PCI	0x02
 int get_boot_mode(void);
 void setup_cs_reloc(void);
-#endif
 
 void check_env(void);
 #if defined(CONFIG_CMD_DOC)
diff --git a/board/mpl/common/pci_parts.h b/board/mpl/common/pci_parts.h
index 4193e92..75e8cae 100644
--- a/board/mpl/common/pci_parts.h
+++ b/board/mpl/common/pci_parts.h
@@ -91,7 +91,7 @@ static struct pci_pip405_config_entry piix4_isa_bridge_f0[] = {
 static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = {
 	{PCI_CFG_PIIX4_BMIBA,	0x0001000,	4}, /* set BMI to a valid address */
 	{PCI_COMMAND,		0x0001,		2}, /* enable IO access	*/
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
 	{PCI_CFG_PIIX4_IDETIM,	0x80008000,	4}, /* enable Both IDE channels	*/
 #else
 	{PCI_CFG_PIIX4_IDETIM,	0x00008000,	4}, /* enable IDE channel0	*/
@@ -101,7 +101,7 @@ static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = {
 
 /* PIIX4 USB Controller Function 2 */
 static struct pci_pip405_config_entry piix4_usb_cntrl_f2[] = {
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
 	{PCI_INTERRUPT_LINE,	31,		1}, /* Int vector = 31		*/
 	{PCI_BASE_ADDRESS_4,	0x0000E001,	4}, /* Set IO Address to 0xe000 to 0xe01F */
 	{PCI_LATENCY_TIMER,	0x80,		1}, /* Latency Timer 0x80	*/