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| author | Stefan Roese <sr@denx.de> | 2007-08-14 14:36:29 (GMT) |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-08-14 14:36:29 (GMT) |
| commit | 3b3bff4cbf2cb14f9a3e7d03f26ebab900efe4ae (patch) | |
| tree | fb66bf8861d9f78765160d734a438856f5317cdb /board/netstal/hcu4 | |
| parent | 4ce846ec59f36b85d6644a769690ad3feb667575 (diff) | |
| parent | 4ef35e53c693556c54b0c22d6f873de87bade253 (diff) | |
| download | u-boot-fsl-qoriq-3b3bff4cbf2cb14f9a3e7d03f26ebab900efe4ae.tar.xz | |
Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'board/netstal/hcu4')
| -rw-r--r-- | board/netstal/hcu4/hcu4.c | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/board/netstal/hcu4/hcu4.c b/board/netstal/hcu4/hcu4.c index 252aaa7..2b95604 100644 --- a/board/netstal/hcu4/hcu4.c +++ b/board/netstal/hcu4/hcu4.c @@ -29,9 +29,6 @@ DECLARE_GLOBAL_DATA_PTR; #define HCU_MACH_VERSIONS_REGISTER (0x7C000000 + 0xF00000) -#define mtsdram(reg, data) { mtdcr(memcfga,reg);mtdcr(memcfgd,data); } -#define mfsdram(value, reg) { mtdcr(memcfga,reg); value = mfdcr(memcfgd); } - #define SDRAM_LEN 32*1024*1024 /* 32 MB -RAM */ #define DO_UGLY_SDRAM_WORKAROUND @@ -164,17 +161,17 @@ void show_sdram_registers(void) u32 value; printf ("SDRAM Controller Registers --\n"); - mfsdram(value, mem_mcopt1); + mfsdram(mem_mcopt1, value); printf (" SDRAM0_CFG : 0x%08x\n", value); - mfsdram(value, mem_status); + mfsdram(mem_status, value); printf (" SDRAM0_STATUS: 0x%08x\n", value); - mfsdram(value, mem_mb0cf); + mfsdram(mem_mb0cf, value); printf (" SDRAM0_B0CR : 0x%08x\n", value); - mfsdram(value, mem_mb1cf); + mfsdram(mem_mb1cf, value); printf (" SDRAM0_B1CR : 0x%08x\n", value); - mfsdram(value, mem_sdtr1); + mfsdram(mem_sdtr1, value); printf (" SDRAM0_TR : 0x%08x\n", value); - mfsdram(value, mem_rtr); + mfsdram(mem_rtr, value); printf (" SDRAM0_RTR : 0x%08x\n", value); } #endif |