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authorMarek Vasut <marek.vasut@gmail.com>2017-05-13 13:57:45 (GMT)
committerNobuhiro Iwamatsu <iwamatsu@nigauri.org>2017-05-21 19:38:27 (GMT)
commit8474681c3eb37f65c08eb9080cef817c38ee60c4 (patch)
tree4eab5e70a9e9488c974cc288871b1866b1780116 /board
parent60c48e42a073a34fd39caa802c826a4e3de53514 (diff)
downloadu-boot-fsl-qoriq-8474681c3eb37f65c08eb9080cef817c38ee60c4.tar.xz
ARM: rmobile: salvator-x: Adjust UART clock
The UART uses internal SCIF clock except on R8A7795 H3 WS1.0 . Use the internal clock and ignore the early version of the chip. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'board')
-rw-r--r--board/renesas/salvator-x/salvator-x.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c
index 038d6de..3f2bebf 100644
--- a/board/renesas/salvator-x/salvator-x.c
+++ b/board/renesas/salvator-x/salvator-x.c
@@ -109,8 +109,8 @@ void reset_cpu(ulong addr)
static const struct sh_serial_platdata serial_platdata = {
.base = SCIF2_BASE,
.type = PORT_SCIF,
- .clk = 14745600, /* 0xE10000 */
- .clk_mode = EXT_CLK,
+ .clk = CONFIG_SH_SCIF_CLK_FREQ,
+ .clk_mode = INT_CLK,
};
U_BOOT_DEVICE(salvator_x_scif2) = {