diff options
author | Matthias Weisser <weisserm@arcor.de> | 2011-07-06 00:28:32 (GMT) |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-07-14 13:41:24 (GMT) |
commit | 95d185894bcb6c3dffb70ef69f3c80516d19bd49 (patch) | |
tree | e67f030c5a249f3c589d232077b6eaf041203bf4 /board | |
parent | 23210d8e1b369404c27ec6cc4a44ed069c4bb5ac (diff) | |
download | u-boot-fsl-qoriq-95d185894bcb6c3dffb70ef69f3c80516d19bd49.tar.xz |
imx: Make imx25 compatible to mxc_gpio driver and fix in tx25
Adding support for mxc_gpio driver for imx25 and fix names of registers in tx25
board.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Diffstat (limited to 'board')
-rw-r--r-- | board/karo/tx25/tx25.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/board/karo/tx25/tx25.c b/board/karo/tx25/tx25.c index 269858c..4088374 100644 --- a/board/karo/tx25/tx25.c +++ b/board/karo/tx25/tx25.c @@ -70,18 +70,18 @@ void tx25_fec_init(void) writel(0x0, &padctl->pad_d11); /* drop PHY power and assert reset (low) */ - val = readl(&gpio4->dr) & ~((1 << 7) | (1 << 9)); - writel(val, &gpio4->dr); - val = readl(&gpio4->dir) | (1 << 7) | (1 << 9); - writel(val, &gpio4->dir); + val = readl(&gpio4->gpio_dr) & ~((1 << 7) | (1 << 9)); + writel(val, &gpio4->gpio_dr); + val = readl(&gpio4->gpio_dir) | (1 << 7) | (1 << 9); + writel(val, &gpio4->gpio_dir); mdelay(5); debug("resetting phy\n"); /* turn on PHY power leaving reset asserted */ - val = readl(&gpio4->dr) | 1 << 9; - writel(val, &gpio4->dr); + val = readl(&gpio4->gpio_dr) | 1 << 9; + writel(val, &gpio4->gpio_dr); mdelay(10); @@ -111,19 +111,19 @@ void tx25_fec_init(void) /* * set each to 1 and make each an output */ - val = readl(&gpio3->dr) | (1 << 10) | (1 << 11) | (1 << 12); - writel(val, &gpio3->dr); - val = readl(&gpio3->dir) | (1 << 10) | (1 << 11) | (1 << 12); - writel(val, &gpio3->dir); + val = readl(&gpio3->gpio_dr) | (1 << 10) | (1 << 11) | (1 << 12); + writel(val, &gpio3->gpio_dr); + val = readl(&gpio3->gpio_dir) | (1 << 10) | (1 << 11) | (1 << 12); + writel(val, &gpio3->gpio_dir); mdelay(22); /* this value came from RedBoot */ /* * deassert PHY reset */ - val = readl(&gpio4->dr) | 1 << 7; - writel(val, &gpio4->dr); - writel(val, &gpio4->dr); + val = readl(&gpio4->gpio_dr) | 1 << 7; + writel(val, &gpio4->gpio_dr); + writel(val, &gpio4->gpio_dr); mdelay(5); |