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| author | Stephen Warren <swarren@nvidia.com> | 2015-08-19 21:15:41 (GMT) |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2015-09-16 23:10:22 (GMT) |
| commit | bfac08472371d4d6d4fa56972b0e1166f780633a (patch) | |
| tree | 7ca7ad2530ef0ab2e51164021d00c25f050618a0 /common/cmd_softswitch.c | |
| parent | a6b2daffdedf0664f7b49eb20c81f1adada6bd51 (diff) | |
| download | u-boot-fsl-qoriq-bfac08472371d4d6d4fa56972b0e1166f780633a.tar.xz | |
ARM: tegra: fix COUNTER_FREQUENCY for T210
While T210 boards all have 38.4MHz crystals, per the TRM, the only
supported configuration is to divide the crystal frequency by 2 to
generate clk_m, which is what feeds the ARM generic timers amongst other
things. Fix the value of COUNTER_FREQUENCY to reflect this divide-by-2.
When I queried the 19.2 value in Tom's original T210 patches, I wasn't
aware of this extra divide-by-2, and didn't notice any effect from the
incorrect value, since its only used if U-Boot is booted in EL3, whereas
I'm booting it in EL2.
Reported-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'common/cmd_softswitch.c')
0 files changed, 0 insertions, 0 deletions