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| author | Stefan Roese <sr@denx.de> | 2016-06-15 12:15:25 (GMT) |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-07-12 05:46:01 (GMT) |
| commit | f2a751bebafed498d216f8d9a49d21f0d8335fe3 (patch) | |
| tree | dc5414cd8c804c70808f4442e976d9c5931cc340 /configs/conga-qeval20-qa3-e3845-internal-uart_defconfig | |
| parent | d9703a0725707dc39d58c1de486af26ea3886e56 (diff) | |
| download | u-boot-fsl-qoriq-f2a751bebafed498d216f8d9a49d21f0d8335fe3.tar.xz | |
x86: conga-qeval20-qa3: Add support for internal UART
This patch adds support to enable and use the internal BayTrail UART
instead of the one integrated in the Super IO Winbond chip. For this,
a 2nd defconfig file is added.
This is useful for tests done for the congatec SoM used on baseboards
without such a Super IO chip.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'configs/conga-qeval20-qa3-e3845-internal-uart_defconfig')
| -rw-r--r-- | configs/conga-qeval20-qa3-e3845-internal-uart_defconfig | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig new file mode 100644 index 0000000..26f83ba --- /dev/null +++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig @@ -0,0 +1,63 @@ +CONFIG_X86=y +CONFIG_VENDOR_CONGATEC=y +CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y +CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845" +CONFIG_INTERNAL_UART=y +CONFIG_HAVE_INTEL_ME=y +CONFIG_ENABLE_MRC_CACHE=y +CONFIG_SMP=y +CONFIG_HAVE_VGA_BIOS=y +CONFIG_GENERATE_PIRQ_TABLE=y +CONFIG_GENERATE_MP_TABLE=y +CONFIG_GENERATE_ACPI_TABLE=y +CONFIG_SEABIOS=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_CPU=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +# CONFIG_CMD_NFS is not set +CONFIG_CMD_PING=y +CONFIG_CMD_TIME=y +CONFIG_CMD_BOOTSTAGE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_CPU=y +CONFIG_WINBOND_W83627=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DM_ETH=y +CONFIG_E1000=y +CONFIG_DM_PCI=y +CONFIG_DM_RTC=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_BASE=0x3f8 +CONFIG_DEBUG_UART_CLOCK=1843200 +CONFIG_SYS_NS16550=y +CONFIG_ICH_SPI=y +CONFIG_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_VIDEO_VESA=y +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_114=y +CONFIG_USE_PRIVATE_LIBGCC=y |