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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2016-10-28 10:21:28 (GMT)
committerHans de Goede <hdegoede@redhat.com>2016-10-30 10:38:04 (GMT)
commit297bb9e0fc7049c7771feed5e11cf6db89b19f27 (patch)
tree8a1ab699cd722d580e836f76c8a6bfed2a91843f /configs/digsy_mtc_rev5_RAMBOOT_defconfig
parentfed329aebe3aaac0928c73547ac6316af2adf0cd (diff)
downloadu-boot-fsl-qoriq-297bb9e0fc7049c7771feed5e11cf6db89b19f27.tar.xz
sunxi: DRAM initialisation for sun9i
This adds DRAM initialisation code for sun9i, which calculates the appropriate timings based on timing information for the supplied DDR3 bin and the clock speeds used. With this DRAM setup, we have verified DDR3 clocks of up to 792MHz (i.e. DDR3-1600) on the A80-Q7 using a dual-channel configuration. [wens@csie.org: Moved dram_sun9i.c to arch/arm/mach-sunxi/; style cleanup] Signed-off-by: Chen-Yu Tsai <wens@csie.org> [hdegoede@redhat.com: Drop some huge non-documenting #if 0 ... #endif blocks] [hdegoede@redhat.com: Fix checkpatch warnings] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'configs/digsy_mtc_rev5_RAMBOOT_defconfig')
0 files changed, 0 insertions, 0 deletions