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author | Tom Rini <trini@konsulko.com> | 2015-09-07 12:56:08 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2015-09-07 12:56:08 (GMT) |
commit | a6003397f7b74f7af6c21954073e046de08f43c9 (patch) | |
tree | 49fd7e2356979bea9d9f4fffe1875ec02e5059b2 /configs | |
parent | a883f83e6d62fef1830b1634ccb72535c43696f7 (diff) | |
parent | a7ed0ac2620b00c6eb85227f3c66bc169ad11f44 (diff) | |
download | u-boot-fsl-qoriq-a6003397f7b74f7af6c21954073e046de08f43c9.tar.xz |
Merge git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'configs')
-rw-r--r-- | configs/socfpga_de0_nano_soc_defconfig | 20 | ||||
-rw-r--r-- | configs/socfpga_mcvevk_defconfig | 21 | ||||
-rw-r--r-- | configs/socfpga_sockit_defconfig | 26 |
3 files changed, 67 insertions, 0 deletions
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig new file mode 100644 index 0000000..2b0d510 --- /dev/null +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -0,0 +1,20 @@ +CONFIG_ARM=y +CONFIG_ARCH_SOCFPGA=y +CONFIG_TARGET_SOCFPGA_CYCLONE5=y +CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" +CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_OF_CONTROL=y +CONFIG_DM_ETH=y +CONFIG_NETDEVICES=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_GPIO=y +CONFIG_DWAPB_GPIO=y +CONFIG_SPL_DM=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SIMPLE_BUS=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_ADDR=0x00800000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig new file mode 100644 index 0000000..36ec320 --- /dev/null +++ b/configs/socfpga_mcvevk_defconfig @@ -0,0 +1,21 @@ +CONFIG_ARM=y +CONFIG_ARCH_SOCFPGA=y +CONFIG_TARGET_SOCFPGA_CYCLONE5=y +CONFIG_TARGET_SOCFPGA_DENX_MCVEVK=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk" +CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_OF_CONTROL=y +CONFIG_DM_ETH=y +CONFIG_NETDEVICES=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_GPIO=y +CONFIG_DWAPB_GPIO=y +CONFIG_SPL_DM=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_DM_SEQ_ALIAS=y +CONFIG_SPL_SIMPLE_BUS=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_ADDR=0x00800000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig new file mode 100644 index 0000000..01723c5 --- /dev/null +++ b/configs/socfpga_sockit_defconfig @@ -0,0 +1,26 @@ +CONFIG_ARM=y +CONFIG_ARCH_SOCFPGA=y +CONFIG_TARGET_SOCFPGA_CYCLONE5=y +CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit" +CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_OF_CONTROL=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_USE_4K_SECTORS=n +CONFIG_DM_ETH=y +CONFIG_NETDEVICES=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_GPIO=y +CONFIG_DWAPB_GPIO=y +CONFIG_SPL_DM=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_DM_SEQ_ALIAS=y +CONFIG_SPL_SIMPLE_BUS=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_ADDR=0x00800000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 |