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| author | Stefano Babic <sbabic@denx.de> | 2010-03-05 16:54:37 (GMT) |
|---|---|---|
| committer | Tom Rix <Tom.Rix@windriver.com> | 2010-03-07 18:36:36 (GMT) |
| commit | e4d34492017c95e4041ea0c581e1ab8d1d49381b (patch) | |
| tree | 3badc8c1ab6433507c7c9d6993ad7aaacb47bf4f /cpu/arm_cortexa8/mx51/soc.c | |
| parent | 9d69e33d8d0f112fe3a089101d023e87431684d1 (diff) | |
| download | u-boot-fsl-qoriq-e4d34492017c95e4041ea0c581e1ab8d1d49381b.tar.xz | |
MX51: removed warnings for the mx51evk
The patch removes warnings at compile time and provides
some cleanup code:
- Removed comment on NAND (not yet supported) from lowlevel_init.S
- Removed NFMS bit definition from imx-regs.h
The bit is only related to MX.25/35 and can lead to confusion
- Moved is_soc_rev() to soc specific code (removed from mx51evk.c)
Signed-off-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'cpu/arm_cortexa8/mx51/soc.c')
| -rw-r--r-- | cpu/arm_cortexa8/mx51/soc.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/cpu/arm_cortexa8/mx51/soc.c b/cpu/arm_cortexa8/mx51/soc.c index 5e69301..2a139b2 100644 --- a/cpu/arm_cortexa8/mx51/soc.c +++ b/cpu/arm_cortexa8/mx51/soc.c @@ -25,9 +25,14 @@ #include <common.h> #include <asm/arch/imx-regs.h> +#include <asm/arch/clock.h> #include <asm/errno.h> #include <asm/io.h> +#ifdef CONFIG_FSL_ESDHC +#include <fsl_esdhc.h> +#endif + u32 get_cpu_rev(void) { int reg; @@ -65,7 +70,7 @@ int print_cpuinfo(void) printf("CPU: Freescale i.MX51 family %d.%dV at %d MHz\n", (cpurev & 0xF0) >> 4, (cpurev & 0x0F) >> 4, - get_mcu_main_clk() / 1000000); + mxc_get_clock(MXC_ARM_CLK) / 1000000); return 0; } #endif |