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author | Kumar Gala <galak@kernel.crashing.org> | 2009-03-19 07:46:28 (GMT) |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2010-01-05 19:49:04 (GMT) |
commit | bcad21fda187f7d8d5d2c026c395cca35a9c700e (patch) | |
tree | 658a4e5d50d1fd48d7b350af1226b75eb80684f2 /cpu/mpc85xx/fdt.c | |
parent | 178e39e199e9c985e5e5e968d60d7243fceb5616 (diff) | |
download | u-boot-fsl-qoriq-bcad21fda187f7d8d5d2c026c395cca35a9c700e.tar.xz |
85xx: Add support to set DPAA (data path) devices clock frequencies
Set clock-frequency for Frame Manager 0/1 and Patter Match Engine on p4080.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx/fdt.c')
-rw-r--r-- | cpu/mpc85xx/fdt.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c index 5f9aeb1..af0e78e 100644 --- a/cpu/mpc85xx/fdt.c +++ b/cpu/mpc85xx/fdt.c @@ -297,6 +297,40 @@ void fdt_add_enet_stashing(void *fdt) do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-idx", 0, 1); } +#if defined(CONFIG_SYS_DPAA_FMAN) || defined(CONFIG_SYS_DPAA_PME) +static void ft_fixup_clks(void *blob, const char *alias, unsigned long freq) +{ + const char *path = fdt_get_alias(blob, alias); + + int off = fdt_path_offset(blob, path); + + if (off >= 0) { + off = fdt_setprop_cell(blob, off, "clock-frequency", freq); + if (off > 0) + printf("WARNING enable to set clock-frequency " + "for %s: %s\n", alias, fdt_strerror(off)); + } +} + +static void ft_fixup_dpaa_clks(void *blob) +{ + sys_info_t sysinfo; + + get_sys_info(&sysinfo); + ft_fixup_clks(blob, "fman0", sysinfo.freqFMan[0]); + +#if (CONFIG_SYS_NUM_FMAN == 2) + ft_fixup_clks(blob, "fman1", sysinfo.freqFMan[1]); +#endif + +#ifdef CONFIG_SYS_DPAA_PME + ft_fixup_clks(blob, "pme", sysinfo.freqPME); +#endif +} +#else +#define ft_fixup_dpaa_clks(x) +#endif + void ft_cpu_setup(void *blob, bd_t *bd) { int off; @@ -360,4 +394,6 @@ void ft_cpu_setup(void *blob, bd_t *bd) #if defined(CONFIG_FSL_ESDHC) fdt_fixup_esdhc(blob, bd); #endif + + ft_fixup_dpaa_clks(blob); } |