diff options
author | wdenk <wdenk> | 2003-06-04 15:05:30 (GMT) |
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committer | wdenk <wdenk> | 2003-06-04 15:05:30 (GMT) |
commit | f3e0de60a6dfa2bedd99bda257841a22b5153f42 (patch) | |
tree | 0dde9b4b5335d5889587fc19f7870db1034b636e /cpu/ppc4xx/405gp_pci.c | |
parent | 682011ff6968198da14b89e40d9f55b00f6d91f7 (diff) | |
download | u-boot-fsl-qoriq-f3e0de60a6dfa2bedd99bda257841a22b5153f42.tar.xz |
* Patch by Denis Peter, 04 June 2003:
add support for the MIP405T board
Diffstat (limited to 'cpu/ppc4xx/405gp_pci.c')
-rw-r--r-- | cpu/ppc4xx/405gp_pci.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/cpu/ppc4xx/405gp_pci.c b/cpu/ppc4xx/405gp_pci.c index 7289523..82142a2 100644 --- a/cpu/ppc4xx/405gp_pci.c +++ b/cpu/ppc4xx/405gp_pci.c @@ -177,7 +177,7 @@ void pci_405gp_init(struct pci_controller *hose) * PLB address 0x80000000-0xBFFFFFFF ==> PCI address 0x80000000-0xBFFFFFFF * Use byte reversed out routines to handle endianess. *--------------------------------------------------------------------------*/ - out32r(PMM0MA, pmmma[0]); /* ensure disabled b4 setting PMM0LA */ + out32r(PMM0MA, (pmmma[0]&~0x1)); /* disable, configure PMMxLA, PMMxPCILA first */ out32r(PMM0LA, pmmla[0]); out32r(PMM0PCILA, pmmpcila[0]); out32r(PMM0PCIHA, pmmpciha[0]); @@ -186,7 +186,7 @@ void pci_405gp_init(struct pci_controller *hose) /*--------------------------------------------------------------------------+ * PMM1 is not used. Initialize them to zero. *--------------------------------------------------------------------------*/ - out32r(PMM1MA, pmmma[1]); /* ensure disabled b4 setting PMM2LA */ + out32r(PMM1MA, (pmmma[1]&~0x1)); out32r(PMM1LA, pmmla[1]); out32r(PMM1PCILA, pmmpcila[1]); out32r(PMM1PCIHA, pmmpciha[1]); @@ -195,7 +195,7 @@ void pci_405gp_init(struct pci_controller *hose) /*--------------------------------------------------------------------------+ * PMM2 is not used. Initialize them to zero. *--------------------------------------------------------------------------*/ - out32r(PMM2MA, pmmma[2]); /* ensure disabled b4 setting PMM2LA */ + out32r(PMM2MA, (pmmma[2]&~0x1)); out32r(PMM2LA, pmmla[2]); out32r(PMM2PCILA, pmmpcila[2]); out32r(PMM2PCIHA, pmmpciha[2]); |