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| author | Stefan Roese <sr@denx.de> | 2007-11-16 13:16:54 (GMT) |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-11-16 13:16:54 (GMT) |
| commit | f31d38b9eea9b32f6a1ac848a298cc71ca4c9a03 (patch) | |
| tree | 8af96c3ac5e48e17b0f4595f5cd53f8eabef3204 /cpu/ppc4xx/cpu.c | |
| parent | ecdcbd4f8c1f8cefd785752f4e7536aae2a4ecf9 (diff) | |
| download | u-boot-fsl-qoriq-f31d38b9eea9b32f6a1ac848a298cc71ca4c9a03.tar.xz | |
ppc4xx: Enable 405EX PCIe UTL register configuration
Till now the UTL registers on 405EX were not initialized but left with
their default values. This patch new initializes some of the UTL
registers on 405EX.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx/cpu.c')
| -rw-r--r-- | cpu/ppc4xx/cpu.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index d376f52..9e9c685 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -510,7 +510,6 @@ int checkcpu (void) return 0; } -#if defined (CONFIG_440SPE) int ppc440spe_revB() { unsigned int pvr; @@ -520,7 +519,6 @@ int ppc440spe_revB() { else return 0; } -#endif /* ------------------------------------------------------------------------- */ |