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author | Andre Schwarz <andre.schwarz@matrix-vision.de> | 2008-07-09 16:30:44 (GMT) |
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committer | Grant Likely <grant.likely@secretlab.ca> | 2008-07-15 16:12:58 (GMT) |
commit | 5e0de0e216b8fb27634afb11c60a2fa24c23349e (patch) | |
tree | 9658cd67b59fa936cfc535eb7e093d3d0f97a008 /doc/README.mvbc_p | |
parent | 348753d416cd2c9e7ec6520a544c8f33cf02a560 (diff) | |
download | u-boot-fsl-qoriq-5e0de0e216b8fb27634afb11c60a2fa24c23349e.tar.xz |
mpc5xxx: Add MVBC_P board support
The MVBC_P is a MPC5200B based camera system with Intel Gigabit ethernet
controller (using e1000) and custom Altera Cyclone-II FPGA on PCI.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'doc/README.mvbc_p')
-rw-r--r-- | doc/README.mvbc_p | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/doc/README.mvbc_p b/doc/README.mvbc_p new file mode 100644 index 0000000..d32e57f --- /dev/null +++ b/doc/README.mvbc_p @@ -0,0 +1,74 @@ +Matrix Vision mvBlueCOUGAR-P (mvBC-P) +------------------------------------- + +1. Board Description + + The mvBC-P is a 70x40x40mm multi board gigabit ethernet network camera + with main focus on GigEVision protocol in combination with local image + preprocessing. + + Power Supply is either VDC 48V or Pover over Ethernet (PoE). + +2 System Components + +2.1 CPU + Freescale MPC5200B CPU running at 400MHz core and 133MHz XLB/IPB. + 64MB SDRAM @ 133MHz. + 8 MByte Nor Flash on local bus. + 1 serial ports. Console running on ttyS0 @ 115200 8N1. + +2.2 PCI + PCI clock fixed at 66MHz. Arbitration inside FPGA. + Intel GD82541ER network MAC/PHY and FPGA connected. + +2.3 FPGA + Altera Cyclone-II EP2C8 with PCI DMA engine. + Connects to Matrix Vision specific CCD/CMOS sensor interface. + Utilizes 64MB Nand Flash. + +2.3.1 I/O @ FPGA + 2 Outputs : photo coupler + 2 Inputs : photo coupler + +2.4 I2C + LM75 @ 0x90 for temperature monitoring. + EEPROM @ 0xA0 for vendor specifics. + image sensor interface (slave adresses depend on sensor) + +3 Flash layout. + + reset vector is 0x00000100, i.e. "LOWBOOT". + + FF800000 u-boot + FF840000 u-boot script image + FF850000 redundant u-boot script image + FF860000 FPGA raw bit file + FF8A0000 tbd. + FF900000 root FS + FFC00000 kernel + FFFC0000 device tree blob + FFFD0000 redundant device tree blob + FFFE0000 environment + FFFF0000 redundant environment + + mtd partitions are propagated to linux kernel via device tree blob. + +4 Booting + + On startup the bootscript @ FF840000 is executed. This script can be + exchanged easily. Default boot mode is "boot from flash", i.e. system + works stand-alone. + + This behaviour depends on some environment variables : + + "netboot" : yes ->try dhcp/bootp and boot from network. + A "dhcp_client_id" and "dhcp_vendor-class-identifier" can be used for + DHCP server configuration, e.g. to provide different images to + different devices. + + During netboot the system tries to get 3 image files: + 1. Kernel - name + data is given during BOOTP. + 2. Initrd - name is stored in "initrd_name" + 3. device tree blob - name is stored in "dtb_name" + Fallback files are the flash versions. + |