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author | Tom Rini <trini@konsulko.com> | 2015-07-14 18:13:23 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2015-07-14 18:13:23 (GMT) |
commit | 4905dfc65d9a17083727865302d2cf633c15c911 (patch) | |
tree | 1f75e2faf8005151705219226916a571467208ca /doc | |
parent | f4815763b410d8657f6f617067a1d53024b05220 (diff) | |
parent | 8097cba809d8c40d8fe72f792c7dc0644c845a32 (diff) | |
download | u-boot-fsl-qoriq-4905dfc65d9a17083727865302d2cf633c15c911.tar.xz |
Merge branch 'master' of git://git.denx.de/u-boot-spi
Diffstat (limited to 'doc')
-rw-r--r-- | doc/device-tree-bindings/spi/spi-cadence.txt | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/spi/spi-cadence.txt b/doc/device-tree-bindings/spi/spi-cadence.txt new file mode 100644 index 0000000..c1e2233 --- /dev/null +++ b/doc/device-tree-bindings/spi/spi-cadence.txt @@ -0,0 +1,28 @@ +Cadence QSPI controller device tree bindings +-------------------------------------------- + +Required properties: +- compatible : should be "cadence,qspi". +- reg : 1.Physical base address and size of SPI registers map. + 2. Physical base address & size of NOR Flash. +- clocks : Clock phandles (see clock bindings for details). +- sram-size : spi controller sram size. +- status : enable in requried dts. + +connected flash properties +-------------------------- + +- spi-max-frequency : Max supported spi frequency. +- page-size : Flash page size. +- block-size : Flash memory block size. +- tshsl-ns : Added delay in master reference clocks (ref_clk) for + the length that the master mode chip select outputs + are de-asserted between transactions. +- tsd2d-ns : Delay in master reference clocks (ref_clk) between one + chip select being de-activated and the activation of + another. +- tchsh-ns : Delay in master reference clocks between last bit of + current transaction and de-asserting the device chip + select (n_ss_out). +- tslch-ns : Delay in master reference clocks between setting + n_ss_out low and first bit transfer |