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author | Jagan Teki <jteki@openedev.com> | 2015-06-26 19:21:33 (GMT) |
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committer | Jagan Teki <jteki@openedev.com> | 2015-07-01 15:45:03 (GMT) |
commit | a8a8fc9ceea8430224c8c0ac932a75c029a1e225 (patch) | |
tree | 5d7b6796ddbd220e41599497974b55cd60f17aac /doc | |
parent | 9f7a45020bc30934ed4ba3f0c2e4535248934186 (diff) | |
download | u-boot-fsl-qoriq-a8a8fc9ceea8430224c8c0ac932a75c029a1e225.tar.xz |
dts: zynq: Add zynq spi controller nodes
This patch adds zynq spi controller nodes in zynq-7000.dtsi.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Diffstat (limited to 'doc')
-rw-r--r-- | doc/device-tree-bindings/spi/spi-zynq.txt | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/spi/spi-zynq.txt b/doc/device-tree-bindings/spi/spi-zynq.txt new file mode 100644 index 0000000..a7c2757 --- /dev/null +++ b/doc/device-tree-bindings/spi/spi-zynq.txt @@ -0,0 +1,27 @@ +Zynq SPI controller Device Tree Bindings +---------------------------------------- + +Required properties: +- compatible : Should be "xlnx,spi-zynq". +- reg : Physical base address and size of SPI registers map. +- status : Status will be disabled in dtsi and enabled in required dts. +- interrupt-parent : Must be core interrupt controller. +- interrupts : Property with a value describing the interrupt + number. +- clocks : Clock phandles (see clock bindings for details). +- clock-names : List of input clock names - "ref_clk", "pclk" + (See clock bindings for details). + +Example: + + spi@e0006000 { + compatible = "xlnx,zynq-spi"; + reg = <0xe0006000 0x1000>; + status = "disabled"; + interrupt-parent = <&intc>; + interrupts = <0 26 4>; + clocks = <&clkc 25>, <&clkc 34>; + clock-names = "ref_clk", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + } ; |