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authormaxims@google.com <maxims@google.com>2017-04-17 19:00:29 (GMT)
committerTom Rini <trini@konsulko.com>2017-05-08 15:57:34 (GMT)
commit4999bb06cc2f21d3a517a068b183fb11827f49a7 (patch)
treec6b92d76a598d2efea41a928b4f2a617d3235b2c /drivers/clk
parent3ef7f12cdd1b042cf657a1ea734bb9d2a4adc0da (diff)
downloadu-boot-fsl-qoriq-4999bb06cc2f21d3a517a068b183fb11827f49a7.tar.xz
aspeed: Add P-Bus clock in ast2500 clock driver
Add P-Bus Clock support to ast2500 clock driver. This is the clock used by I2C devices. Signed-off-by: Maxim Sloyko <maxims@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/aspeed/clk_ast2500.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c
index 5047312..9e4c66e 100644
--- a/drivers/clk/aspeed/clk_ast2500.c
+++ b/drivers/clk/aspeed/clk_ast2500.c
@@ -110,6 +110,17 @@ static ulong ast2500_clk_get_rate(struct clk *clk)
rate = ast2500_get_mpll_rate(clkin,
readl(&priv->scu->m_pll_param));
break;
+ case BCLK_PCLK:
+ {
+ ulong apb_div = 4 + 4 * ((readl(&priv->scu->clk_sel1)
+ >> SCU_PCLK_DIV_SHIFT) &
+ SCU_PCLK_DIV_MASK);
+ rate = ast2500_get_hpll_rate(clkin,
+ readl(&priv->scu->
+ h_pll_param));
+ rate = rate / apb_div;
+ }
+ break;
case PCLK_UART1:
rate = ast2500_get_uart_clk_rate(priv->scu, 1);
break;