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authorPatrice Chotard <patrice.chotard@st.com>2017-08-09 13:13:02 (GMT)
committerTom Rini <trini@konsulko.com>2017-08-13 19:17:37 (GMT)
commitbc5d0384458466ed5b3608d326eec03cd4f13016 (patch)
tree88ab058e10fbde3e58f210f57c1e1c39373bda9d /drivers/gpio
parent7b07a20c5e668b67348dc7a3abbeb437ab0afa52 (diff)
downloadu-boot-fsl-qoriq-bc5d0384458466ed5b3608d326eec03cd4f13016.tar.xz
stm32f1: remove stm32f1 supportHEADmaster
A few years ago STM32F1 SoCs support has been added : 0144caf22ce6acd5c gpio: stm32: add stm32f1 support 2d18ef2364fd3561a ARMv7M: add STM32F1 support But neither STM32F1 dedicated defconfig nor board was associated to these commits. Got confirmation from Tom Rini and Matt Porter to remove all this code [1] [1] http://u-boot.10912.n7.nabble.com/Remove-STM32F1-support-td301603.html Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/stm32_gpio.c94
1 files changed, 0 insertions, 94 deletions
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index ff245db..c04cef4 100644
--- a/drivers/gpio/stm32_gpio.c
+++ b/drivers/gpio/stm32_gpio.c
@@ -19,7 +19,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_STM32F4) || defined(CONFIG_STM32F7)
static const unsigned long io_base[] = {
STM32_GPIOA_BASE, STM32_GPIOB_BASE, STM32_GPIOC_BASE,
STM32_GPIOD_BASE, STM32_GPIOE_BASE, STM32_GPIOF_BASE,
@@ -74,81 +73,6 @@ int stm32_gpio_config(const struct stm32_gpio_dsc *dsc,
out:
return rv;
}
-#elif defined(CONFIG_STM32F1)
-static const unsigned long io_base[] = {
- STM32_GPIOA_BASE, STM32_GPIOB_BASE, STM32_GPIOC_BASE,
- STM32_GPIOD_BASE, STM32_GPIOE_BASE, STM32_GPIOF_BASE,
- STM32_GPIOG_BASE
-};
-
-#define STM32_GPIO_CR_MODE_MASK 0x3
-#define STM32_GPIO_CR_MODE_SHIFT(p) (p * 4)
-#define STM32_GPIO_CR_CNF_MASK 0x3
-#define STM32_GPIO_CR_CNF_SHIFT(p) (p * 4 + 2)
-
-struct stm32_gpio_regs {
- u32 crl; /* GPIO port configuration low */
- u32 crh; /* GPIO port configuration high */
- u32 idr; /* GPIO port input data */
- u32 odr; /* GPIO port output data */
- u32 bsrr; /* GPIO port bit set/reset */
- u32 brr; /* GPIO port bit reset */
- u32 lckr; /* GPIO port configuration lock */
-};
-
-#define CHECK_DSC(x) (!x || x->port > 6 || x->pin > 15)
-#define CHECK_CTL(x) (!x || x->mode > 3 || x->icnf > 3 || x->ocnf > 3 || \
- x->pupd > 1)
-
-int stm32_gpio_config(const struct stm32_gpio_dsc *dsc,
- const struct stm32_gpio_ctl *ctl)
-{
- struct stm32_gpio_regs *gpio_regs;
- u32 *cr;
- int p, crp;
- int rv;
-
- if (CHECK_DSC(dsc)) {
- rv = -EINVAL;
- goto out;
- }
- if (CHECK_CTL(ctl)) {
- rv = -EINVAL;
- goto out;
- }
-
- p = dsc->pin;
-
- gpio_regs = (struct stm32_gpio_regs *)io_base[dsc->port];
-
- if (p < 8) {
- cr = &gpio_regs->crl;
- crp = p;
- } else {
- cr = &gpio_regs->crh;
- crp = p - 8;
- }
-
- clrbits_le32(cr, 0x3 << STM32_GPIO_CR_MODE_SHIFT(crp));
- setbits_le32(cr, ctl->mode << STM32_GPIO_CR_MODE_SHIFT(crp));
-
- clrbits_le32(cr, 0x3 << STM32_GPIO_CR_CNF_SHIFT(crp));
- /* Inputs set the optional pull up / pull down */
- if (ctl->mode == STM32_GPIO_MODE_IN) {
- setbits_le32(cr, ctl->icnf << STM32_GPIO_CR_CNF_SHIFT(crp));
- clrbits_le32(&gpio_regs->odr, 0x1 << p);
- setbits_le32(&gpio_regs->odr, ctl->pupd << p);
- } else {
- setbits_le32(cr, ctl->ocnf << STM32_GPIO_CR_CNF_SHIFT(crp));
- }
-
- rv = 0;
-out:
- return rv;
-}
-#else
-#error STM32 family not supported
-#endif
int stm32_gpout_set(const struct stm32_gpio_dsc *dsc, int state)
{
@@ -207,20 +131,11 @@ int gpio_direction_input(unsigned gpio)
dsc.port = stm32_gpio_to_port(gpio);
dsc.pin = stm32_gpio_to_pin(gpio);
-#if defined(CONFIG_STM32F4) || defined(CONFIG_STM32F7)
ctl.af = STM32_GPIO_AF0;
ctl.mode = STM32_GPIO_MODE_IN;
ctl.otype = STM32_GPIO_OTYPE_PP;
ctl.pupd = STM32_GPIO_PUPD_NO;
ctl.speed = STM32_GPIO_SPEED_50M;
-#elif defined(CONFIG_STM32F1)
- ctl.mode = STM32_GPIO_MODE_IN;
- ctl.icnf = STM32_GPIO_ICNF_IN_FLT;
- ctl.ocnf = STM32_GPIO_OCNF_GP_PP; /* ignored for input */
- ctl.pupd = STM32_GPIO_PUPD_UP; /* ignored for floating */
-#else
-#error STM32 family not supported
-#endif
return stm32_gpio_config(&dsc, &ctl);
}
@@ -233,19 +148,10 @@ int gpio_direction_output(unsigned gpio, int value)
dsc.port = stm32_gpio_to_port(gpio);
dsc.pin = stm32_gpio_to_pin(gpio);
-#if defined(CONFIG_STM32F4) || defined(CONFIG_STM32F7)
ctl.af = STM32_GPIO_AF0;
ctl.mode = STM32_GPIO_MODE_OUT;
ctl.pupd = STM32_GPIO_PUPD_NO;
ctl.speed = STM32_GPIO_SPEED_50M;
-#elif defined(CONFIG_STM32F1)
- ctl.mode = STM32_GPIO_MODE_OUT_50M;
- ctl.ocnf = STM32_GPIO_OCNF_GP_PP;
- ctl.icnf = STM32_GPIO_ICNF_IN_FLT; /* ignored for output */
- ctl.pupd = STM32_GPIO_PUPD_UP; /* ignored for output */
-#else
-#error STM32 family not supported
-#endif
res = stm32_gpio_config(&dsc, &ctl);
if (res < 0)