diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2017-04-30 19:57:05 (GMT) |
|---|---|---|
| committer | Joe Hershberger <joe.hershberger@ni.com> | 2017-06-02 19:44:20 (GMT) |
| commit | 43979cbacb81a3211ea41d890152ec090578d37f (patch) | |
| tree | 4f0e0bc13b8eb12740eba9eed71f93d04e1f7dd7 /drivers/net | |
| parent | f0b94c4bcd6f6975c4f8826aaf015038a5555b83 (diff) | |
| download | u-boot-fsl-qoriq-43979cbacb81a3211ea41d890152ec090578d37f.tar.xz | |
net: pch_gbe: Reset during probe
Using the EG20T gigabit ethernet controller on the MIPS Boston board, we
find that we have to reset the controller in order for the RGMII link to
the PHY to become functional. Without doing so we constantly time out in
pch_gbe_mdio_ready.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/pch_gbe.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c index d40fff0..4aac0f6 100644 --- a/drivers/net/pch_gbe.c +++ b/drivers/net/pch_gbe.c @@ -422,6 +422,7 @@ int pch_gbe_probe(struct udevice *dev) struct pch_gbe_priv *priv; struct eth_pdata *plat = dev_get_platdata(dev); void *iobase; + int err; /* * The priv structure contains the descriptors and frame buffers which @@ -444,6 +445,10 @@ int pch_gbe_probe(struct udevice *dev) pch_gbe_mdio_init(dev->name, priv->mac_regs); priv->bus = miiphy_get_dev_by_name(dev->name); + err = pch_gbe_reset(dev); + if (err) + return err; + return pch_gbe_phy_init(dev); } |