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authorSimon Glass <sjg@chromium.org>2015-06-07 14:50:40 (GMT)
committerSimon Glass <sjg@chromium.org>2015-07-15 00:03:17 (GMT)
commitaec241dfb45e7763716c1cbc98942cb01a3a77fd (patch)
tree1dccf1997219cdcd4bc565751ac5142113d235d3 /drivers/pci/pci_common.c
parentcdb6babec6422ad4b89e447b1b468f625deaea79 (diff)
downloadu-boot-fsl-qoriq-aec241dfb45e7763716c1cbc98942cb01a3a77fd.tar.xz
dm: pci: Use the correct hose when configuring devices
Only the PCI controller has access to the PCI region information. Make sure to use the controller (rather than any attached bridges) when configuring devices. This corrects a failure to scan and configure devices when driver model is enabled for PCI. Also add a comment to explain the problem. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/pci/pci_common.c')
-rw-r--r--drivers/pci/pci_common.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/pci/pci_common.c b/drivers/pci/pci_common.c
index b9ff23f..f67c9c7 100644
--- a/drivers/pci/pci_common.c
+++ b/drivers/pci/pci_common.c
@@ -11,6 +11,7 @@
*/
#include <common.h>
+#include <dm.h>
#include <errno.h>
#include <pci.h>
#include <asm/io.h>
@@ -221,6 +222,11 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller *hose,
return phys_addr;
}
+#ifdef CONFIG_DM_PCI
+ /* The root controller has the region information */
+ hose = hose->ctlr->uclass_priv;
+#endif
+
/*
* if PCI_REGION_MEM is set we do a two pass search with preference
* on matches that don't have PCI_REGION_SYS_MEMORY set