diff options
| author | Vikas Manocha <vikas.manocha@st.com> | 2017-04-10 22:03:04 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-05-08 15:57:23 (GMT) |
| commit | 58fb3c8d89872f82a03c03625dcf5cc61b733bab (patch) | |
| tree | 8f35b4b70970c65d37c7394a76019ab077bb393f /drivers/pinctrl/pinctrl_stm32.c | |
| parent | bfea69ad27936d619c0eb3c1be55cc292df8d7f5 (diff) | |
| download | u-boot-fsl-qoriq-58fb3c8d89872f82a03c03625dcf5cc61b733bab.tar.xz | |
stm32f7: increase the max no of pin configuration to 70
The number of pins to be configured could be more than 50 e.g. in case
of sdram controller, there are about 56 pins (32 data lines, 12 address
& some control signals).
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Diffstat (limited to 'drivers/pinctrl/pinctrl_stm32.c')
| -rw-r--r-- | drivers/pinctrl/pinctrl_stm32.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index 01f0429..d7b5ea3 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -7,6 +7,7 @@ DECLARE_GLOBAL_DATA_PTR; +#define MAX_PINS_ONE_IP 70 #define MODE_BITS_MASK 3 #define OSPEED_MASK 3 #define PUPD_MASK 3 @@ -95,7 +96,7 @@ static int prep_gpio_ctl(struct stm32_gpio_ctl *gpio_ctl, u32 gpio_fn, int node) static int stm32_pinctrl_set_state_simple(struct udevice *dev, struct udevice *periph) { - u32 pin_mux[50]; + u32 pin_mux[MAX_PINS_ONE_IP]; struct fdtdec_phandle_args args; int rv, len; |