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author | Jacob Chen <jacob-chen@iotwrt.com> | 2017-05-02 06:54:48 (GMT) |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2017-05-10 19:37:22 (GMT) |
commit | 1daa93c0b494134d0daafab6944b3eefeb66acee (patch) | |
tree | f1bdc40412400fc280f0d88ee55ccd04da514cbd /drivers/power/regulator | |
parent | ecc3bd73b35398d8337096b19493028a29ed038e (diff) | |
download | u-boot-fsl-qoriq-1daa93c0b494134d0daafab6944b3eefeb66acee.tar.xz |
power: pmic: append rk818 regs to rk808
Both RK808 and RK818 chips are using a similar register map,
so we can reuse them.
I have also add reg prefix to exist registers, to keep them same style.
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/power/regulator')
-rw-r--r-- | drivers/power/regulator/rk808.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/power/regulator/rk808.c b/drivers/power/regulator/rk808.c index adef8f5..f1a00c5 100644 --- a/drivers/power/regulator/rk808.c +++ b/drivers/power/regulator/rk808.c @@ -35,14 +35,14 @@ static const struct rk808_reg_info rk808_buck[] = { }; static const struct rk808_reg_info rk808_ldo[] = { - { 1800000, 100000, LDO1_ON_VSEL, 5, }, - { 1800000, 100000, LDO2_ON_VSEL, 5, }, - { 800000, 100000, LDO3_ON_VSEL, 4, }, - { 1800000, 100000, LDO4_ON_VSEL, 5, }, - { 1800000, 100000, LDO5_ON_VSEL, 5, }, - { 800000, 100000, LDO6_ON_VSEL, 5, }, - { 800000, 100000, LDO7_ON_VSEL, 5, }, - { 1800000, 100000, LDO8_ON_VSEL, 5, }, + { 1800000, 100000, REG_LDO1_ON_VSEL, 5, }, + { 1800000, 100000, REG_LDO2_ON_VSEL, 5, }, + { 800000, 100000, REG_LDO3_ON_VSEL, 4, }, + { 1800000, 100000, REG_LDO4_ON_VSEL, 5, }, + { 1800000, 100000, REG_LDO5_ON_VSEL, 5, }, + { 800000, 100000, REG_LDO6_ON_VSEL, 5, }, + { 800000, 100000, REG_LDO7_ON_VSEL, 5, }, + { 1800000, 100000, REG_LDO8_ON_VSEL, 5, }, }; @@ -69,7 +69,7 @@ static int _buck_set_enable(struct udevice *pmic, int buck, bool enable) buck--; mask = 1 << buck; if (enable) { - ret = pmic_clrsetbits(pmic, DCDC_ILMAX, 0, 3 << (buck * 2)); + ret = pmic_clrsetbits(pmic, REG_DCDC_ILMAX, 0, 3 << (buck * 2)); if (ret) return ret; ret = pmic_clrsetbits(pmic, REG_DCDC_UV_ACT, 1 << buck, 0); |