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author | Bin Meng <bmeng.cn@gmail.com> | 2016-02-01 09:40:36 (GMT) |
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committer | Bin Meng <bmeng.cn@gmail.com> | 2016-02-05 04:47:20 (GMT) |
commit | 9eb4339ba45fc7147b013c8e8d579ebc6d8d1bdb (patch) | |
tree | 7a9b2cfaaf1b144311edb4b9704653e0ff16776d /drivers/spi/ich.c | |
parent | f7c3638c9f6a9beb812adcfb7c61e4c65ac1888d (diff) | |
download | u-boot-fsl-qoriq-9eb4339ba45fc7147b013c8e8d579ebc6d8d1bdb.tar.xz |
spi: ich: Some clean up
This cleans up the ich spi driver a little bit:
- Remove struct ich_spi_slave that is not referenced anywhere
- Remove ending period in some comments
- Move struct ich_spi_platdata and struct ich_spi_priv to ich.h
- Add #ifndef _ICH_H_ .. in ich.h
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Diffstat (limited to 'drivers/spi/ich.c')
-rw-r--r-- | drivers/spi/ich.c | 38 |
1 files changed, 5 insertions, 33 deletions
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index e543b8f..22b5419 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -5,6 +5,7 @@ * * This file is derived from the flashrom project. */ + #include <common.h> #include <dm.h> #include <errno.h> @@ -17,41 +18,12 @@ #include "ich.h" -#define SPI_OPCODE_WREN 0x06 -#define SPI_OPCODE_FAST_READ 0x0b - #ifdef DEBUG_TRACE #define debug_trace(fmt, args...) debug(fmt, ##args) #else #define debug_trace(x, args...) #endif -struct ich_spi_platdata { - enum pch_version ich_version; /* Controller version, 7 or 9 */ -}; - -struct ich_spi_priv { - int ichspi_lock; - int locked; - int opmenu; - int menubytes; - void *base; /* Base of register set */ - int preop; - int optype; - int addr; - int data; - unsigned databytes; - int status; - int control; - int bbar; - int bcr; - uint32_t *pr; /* only for ich9 */ - int speed; /* pointer to speed control */ - ulong max_speed; /* Maximum bus speed in MHz */ - ulong cur_speed; /* Current bus speed */ - struct spi_trans trans; /* current transaction in progress */ -}; - static u8 ich_readb(struct ich_spi_priv *priv, int reg) { u8 value = readb(priv->base + reg); @@ -217,7 +189,7 @@ static void spi_setup_type(struct spi_trans *trans, int data_bytes) { trans->type = 0xFF; - /* Try to guess spi type from read/write sizes. */ + /* Try to guess spi type from read/write sizes */ if (trans->bytesin == 0) { if (trans->bytesout + data_bytes > 4) /* @@ -301,7 +273,7 @@ static int spi_setup_opcode(struct ich_spi_priv *ctlr, struct spi_trans *trans) static int spi_setup_offset(struct spi_trans *trans) { - /* Separate the SPI address and data. */ + /* Separate the SPI address and data */ switch (trans->type) { case SPI_OPCODE_TYPE_READ_NO_ADDRESS: case SPI_OPCODE_TYPE_WRITE_NO_ADDRESS: @@ -410,7 +382,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen, trans->in = din; trans->bytesin = din ? bytes : 0; - /* There has to always at least be an opcode. */ + /* There has to always at least be an opcode */ if (!trans->bytesout) { debug("ICH SPI: No opcode for transfer\n"); return -EPROTO; @@ -541,7 +513,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen, /* write it */ ich_writew(ctlr, control, ctlr->control); - /* Wait for Cycle Done Status or Flash Cycle Error. */ + /* Wait for Cycle Done Status or Flash Cycle Error */ status = ich_status_poll(ctlr, SPIS_CDS | SPIS_FCERR, 1); if (status < 0) return status; |