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| author | York Sun <yorksun@freescale.com> | 2015-03-20 17:20:40 (GMT) |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-04-23 15:55:53 (GMT) |
| commit | f8cb101e1e3f5ee2007b78b6b12e24120385aeac (patch) | |
| tree | 7c7f6856d036f7f873b672143a4c2266d98f392c /drivers/spi/mpc52xx_spi.c | |
| parent | 585acc9de65554e2d77dc3d30a65d59b8766ba39 (diff) | |
| download | u-boot-fsl-qoriq-f8cb101e1e3f5ee2007b78b6b12e24120385aeac.tar.xz | |
driver/i2c/mxc: Enable I2C bus 3 and 4
Some SoCs have more than two I2C busses. Instead of adding ifdef
to the driver, macros are put into board header file where
CONFIG_SYS_I2C_MXC is defined.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'drivers/spi/mpc52xx_spi.c')
0 files changed, 0 insertions, 0 deletions