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author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2015-08-05 22:47:13 (GMT) |
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committer | Tom Warren <twarren@nvidia.com> | 2015-08-13 20:06:03 (GMT) |
commit | 6eeedc196d51e86a1f361c9b5116d67e4cff7783 (patch) | |
tree | 0366baa0f597c68481e8df95c9272c5e0ac5e91a /drivers | |
parent | 29ce99955e6f9eac0fbed18b5becd9377daed07f (diff) | |
download | u-boot-fsl-qoriq-6eeedc196d51e86a1f361c9b5116d67e4cff7783.tar.xz |
tegra: nand: disable subpage writes
Disable subpage writes as we do not provide ecc->hwctl.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/mtd/nand/tegra_nand.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/tegra_nand.c index 723d0ec..debad4f 100644 --- a/drivers/mtd/nand/tegra_nand.c +++ b/drivers/mtd/nand/tegra_nand.c @@ -964,6 +964,9 @@ int tegra_nand_init(struct nand_chip *nand, int devnum) nand->dev_ready = nand_dev_ready; nand->priv = &nand_ctrl; + /* Disable subpage writes as we do not provide ecc->hwctl */ + nand->options |= NAND_NO_SUBPAGE_WRITE; + /* Adjust controller clock rate */ clock_start_periph_pll(PERIPH_ID_NDFLASH, CLOCK_ID_PERIPH, 52000000); |