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authorVladimir Barinov <vladimir.barinov@cogentembedded.com>2015-07-20 17:49:25 (GMT)
committerNobuhiro Iwamatsu <iwamatsu@nigauri.org>2015-08-31 08:26:03 (GMT)
commit9035edbae9dd3c10751d78bf80a1b2bc225cda4f (patch)
tree6394d4dd34b9f6f3bb801be1c742cbfe9fe47aa1 /drivers
parentf875bbb49111c308b90b9ca74d1b79f69498b278 (diff)
downloadu-boot-fsl-qoriq-9035edbae9dd3c10751d78bf80a1b2bc225cda4f.tar.xz
gpio: sh-pfc: fix gpio input read
Fix gpio_read: gpio input (INDT) and gpio output (OUTDT) registers have different offset. gpio_read must be performed from INDT. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpio/sh_pfc.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpio/sh_pfc.c b/drivers/gpio/sh_pfc.c
index 7a5af20..a0eac13 100644
--- a/drivers/gpio/sh_pfc.c
+++ b/drivers/gpio/sh_pfc.c
@@ -75,7 +75,8 @@ static int gpio_read_bit(struct pinmux_data_reg *dr,
debug("read_bit: addr = %lx, pos = %ld, "
"r_width = %ld\n", dr->reg, pos, dr->reg_width);
- return (gpio_read_raw_reg(dr->mapped_reg, dr->reg_width) >> pos) & 1;
+ return
+ (gpio_read_raw_reg(dr->mapped_reg + 0x4, dr->reg_width) >> pos) & 1;
}
static void gpio_write_bit(struct pinmux_data_reg *dr,