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authorAnton staaf <robotboy@chromium.org>2011-10-04 11:24:50 (GMT)
committerWolfgang Denk <wd@denx.de>2011-10-25 07:26:14 (GMT)
commita1969923c90c64ac55f80f14a7ca3ea2c766d079 (patch)
tree4de7f00f7b64589e74eacfd68e86273b3e563474 /drivers
parent4c1cd721d89d4b694dd018736007a97b5cdb04da (diff)
downloadu-boot-fsl-qoriq-a1969923c90c64ac55f80f14a7ca3ea2c766d079.tar.xz
mmc: dcache: allocate cache aligned buffers for ext_csd
Currently the mmc_change_freq and mmc_startup functions allocates buffers on the stack that are passed down to the MMC device driver. These buffers could be unaligned to the L1 dcache line size. This causes problems when using DMA and with caches enabled. This patch correctly cache alignes the buffers used for reading the ext_csd data from an MMC device. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/mmc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index ba6fbfe..e5fedb3 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -618,7 +618,7 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
int mmc_change_freq(struct mmc *mmc)
{
- char ext_csd[512];
+ ALLOC_CACHE_ALIGN_BUFFER(char, ext_csd, 512);
char cardtype;
int err;
@@ -860,7 +860,7 @@ int mmc_startup(struct mmc *mmc)
uint mult, freq;
u64 cmult, csize, capacity;
struct mmc_cmd cmd;
- char ext_csd[512];
+ ALLOC_CACHE_ALIGN_BUFFER(char, ext_csd, 512);
int timeout = 1000;
#ifdef CONFIG_MMC_SPI_CRC_ON