diff options
| author | Wenyou.Yang@microchip.com <Wenyou.Yang@microchip.com> | 2017-07-21 09:04:56 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-08-05 00:38:37 (GMT) |
| commit | c53a825e15ca74902e9d5f68d839011dc11e055f (patch) | |
| tree | 0cd4be06b2ea4979facb7561a21df50951753d8b /include/configs/pm9261.h | |
| parent | 94db5120d874821e5fd1847e1825759aaf74290b (diff) | |
| download | u-boot-fsl-qoriq-c53a825e15ca74902e9d5f68d839011dc11e055f.tar.xz | |
board: pm9261: Update to support DT and DM
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/configs/pm9261.h')
| -rw-r--r-- | include/configs/pm9261.h | 33 |
1 files changed, 6 insertions, 27 deletions
diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index b9c93b0..c4d3d96 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -141,10 +141,6 @@ /* * Hardware drivers */ -#define CONFIG_AT91_GPIO 1 -#define CONFIG_ATMEL_USART 1 -#define CONFIG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS /* LCD */ #define LCD_BPP LCD_COLOR8 @@ -155,13 +151,6 @@ #define CONFIG_ATMEL_LCD 1 #define CONFIG_ATMEL_LCD_BGR555 1 -/* LED */ -#define CONFIG_AT91_LED -#define CONFIG_RED_LED GPIO_PIN_PC(12) -#define CONFIG_GREEN_LED GPIO_PIN_PC(13) -#define CONFIG_YELLOW_LED GPIO_PIN_PC(15) - - /* * BOOTP options */ @@ -175,16 +164,6 @@ #define PHYS_SDRAM 0x20000000 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ -/* DataFlash */ -#define CONFIG_ATMEL_DATAFLASH_SPI -#define CONFIG_HAS_DATAFLASH -#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 -#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ -#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */ -#define AT91_SPI_CLK 15000000 -#define DATAFLASH_TCSS (0x1a << 16) -#define DATAFLASH_TCHS (0x1 << 24) - /* NAND flash */ #define CONFIG_NAND_ATMEL #define CONFIG_SYS_MAX_NAND_DEVICE 1 @@ -235,13 +214,13 @@ #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -#define CONFIG_SYS_MONITOR_BASE \ - (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) #define CONFIG_ENV_OFFSET 0x4200 -#define CONFIG_ENV_ADDR \ - (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) #define CONFIG_ENV_SIZE 0x4200 -#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" +#define CONFIG_ENV_SECT_SIZE 0x210 +#define CONFIG_ENV_SPI_MAX_HZ 15000000 +#define CONFIG_BOOTCOMMAND "sf probe 0; " \ + "sf read 0x22000000 0x84000 0x210000; " \ + "bootm 0x22000000" #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ "root=/dev/mtdblock0 " \ "mtdparts=atmel_nand:-(root) " \ @@ -324,7 +303,7 @@ ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - \ GENERATED_GBL_DATA_SIZE) #endif |