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| author | Wolfgang Denk <wd@denx.de> | 2011-11-08 06:44:52 (GMT) |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-11-08 06:44:52 (GMT) |
| commit | 5721385b187b3154c7768e6c182501022f4e2e45 (patch) | |
| tree | 539198587e4c6f6d03f2065bfebc4bb697773300 /include/configs/tuxa1.h | |
| parent | 688d8f33f27ea596efb6632388ee60360996eed0 (diff) | |
| parent | 6be55ee2252c364b16d99537bf9fe7d96d5c77b4 (diff) | |
| download | u-boot-fsl-qoriq-5721385b187b3154c7768e6c182501022f4e2e45.tar.xz | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
* 'master' of git://git.denx.de/u-boot-mpc83xx:
powerpc/mpc83xx: Add 33.33MHz support for mpc8360emds
powerpc/mpc83xx: Add 512MB DDR support for mpc8360emds
mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds code
mpc83xx: Cleanup usage of LBC constants
mpc83xx: Cleanup usage of DDR constants
mpc83xx: Cleanup usage of BAT constants
mpc83xx: cosmetic: vme8349.h checkpatch compliance
mpc83xx: cosmetic: ve8313.h checkpatch compliance
mpc83xx: cosmetic: sbc8349.h checkpatch compliance
mpc83xx: cosmetic: mpc8308_p1m.h checkpatch compliance
mpc83xx: cosmetic: kmeter1.h checkpatch compliance
mpc83xx: cosmetic: TQM834x.h checkpatch compliance
mpc83xx: cosmetic: SIMPC8313.h checkpatch compliance
mpc83xx: cosmetic: MVBLM7.h checkpatch compliance
mpc83xx: cosmetic: MPC837XERDB.h checkpatch compliance
mpc83xx: cosmetic: MPC837XEMDS.h checkpatch compliance
mpc83xx: cosmetic: MPC8360ERDK.h checkpatch compliance
mpc83xx: cosmetic: MPC8360EMDS.h checkpatch compliance
mpc83xx: cosmetic: MPC8349ITX.h checkpatch compliance
mpc83xx: cosmetic: MPC8349EMDS.h checkpatch compliance
mpc83xx: cosmetic: MPC832XEMDS.h checkpatch compliance
mpc83xx: cosmetic: MPC8323ERDB.h checkpatch compliance
mpc83xx: cosmetic: MPC8315ERDB.h checkpatch compliance
mpc83xx: cosmetic: MPC8313ERDB.h checkpatch compliance
mpc83xx: cosmetic: MPC8308RDB.h checkpatch compliance
mpc83xx: cosmetic: MERGERBOX.h checkpatch compliance
mpc83xx: Fix ipic structure definition
powerpc, mpc83xx: add DDR SDRAM Timing Configuration 3 definitions
cosmetic, powerpc, mpc83xx: checkpatch cleanup
powerpc/83xx: move km 83xx specific i2c code to km83xx_i2c
mpc83xx: fix global timer structure definition
Diffstat (limited to 'include/configs/tuxa1.h')
| -rw-r--r-- | include/configs/tuxa1.h | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/include/configs/tuxa1.h b/include/configs/tuxa1.h index ceeb5a3..2d9af3f 100644 --- a/include/configs/tuxa1.h +++ b/include/configs/tuxa1.h @@ -67,8 +67,8 @@ OR_GPCM_CSNT | \ OR_GPCM_ACS_DIV4 | \ OR_GPCM_SCY_2 | \ - (OR_GPCM_TRLX & \ - (~OR_GPCM_EHTR)) | /* EHTR = 0 */ \ + OR_GPCM_TRLX_SET | \ + OR_GPCM_EHTR_CLEAR | \ OR_GPCM_EAD) /* * PINC2 on the local bus CS3 @@ -85,11 +85,10 @@ #define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_PINC2_SIZE) | \ OR_GPCM_CSNT | \ - (OR_GPCM_ACS_DIV2 & /* ACS = 11 */ \ - (~OR_GPCM_XACS)) | /* XACS = 0 */ \ - (OR_GPCM_SCY_2 & \ - (~OR_GPCM_EHTR)) | /* EHTR = 0 */ \ - OR_GPCM_TRLX) + OR_GPCM_ACS_DIV2 | \ + OR_GPCM_SCY_2 | \ + OR_GPCM_TRLX_SET | \ + OR_GPCM_EHTR_CLEAR) #define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \ 0x0000c000 | \ @@ -99,20 +98,20 @@ * MMU Setup */ /* LPXF: icache cacheable, but dcache-inhibit and guarded */ -#define CONFIG_SYS_IBAT5L (CONFIG_SYS_LPXF_BASE | BATL_PP_10 | \ +#define CONFIG_SYS_IBAT5L (CONFIG_SYS_LPXF_BASE | BATL_PP_RW | \ BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT5U (CONFIG_SYS_LPXF_BASE | BATU_BL_256M | \ BATU_VS | BATU_VP) -#define CONFIG_SYS_DBAT5L (CONFIG_SYS_LPXF_BASE | BATL_PP_10 | \ +#define CONFIG_SYS_DBAT5L (CONFIG_SYS_LPXF_BASE | BATL_PP_RW | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U /* PINC2: icache cacheable, but dcache-inhibit and guarded */ -#define CONFIG_SYS_IBAT6L (CONFIG_SYS_PINC2_BASE | BATL_PP_10 | \ +#define CONFIG_SYS_IBAT6L (CONFIG_SYS_PINC2_BASE | BATL_PP_RW | \ BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT6U (CONFIG_SYS_PINC2_BASE | BATU_BL_256M | \ BATU_VS | BATU_VP) -#define CONFIG_SYS_DBAT6L (CONFIG_SYS_PINC2_BASE | BATL_PP_10 | \ +#define CONFIG_SYS_DBAT6L (CONFIG_SYS_PINC2_BASE | BATL_PP_RW | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U |