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authorMarek Vasut <marex@denx.de>2014-09-14 23:45:14 (GMT)
committerMarek Vasut <marex@denx.de>2014-10-06 15:46:50 (GMT)
commitb5e9b296251f138ef9f9cfc15f408710a24831cd (patch)
treef2ea633bcc66ea69c6c5520ded9ccd916e295838 /include/part_efi.h
parent40e7bcdee72830fa51d9e98428f1a61f9126527e (diff)
downloadu-boot-fsl-qoriq-b5e9b296251f138ef9f9cfc15f408710a24831cd.tar.xz
arm: socfpga: cache: Enable PL310 L2 cache
Enable the PL310 L2 cache controller support for the SoCFPGA. With the cache related issues resolved, this is safe to be done. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
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