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author | Vikas Manocha <vikas.manocha@st.com> | 2014-11-21 18:34:22 (GMT) |
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committer | Tom Rini <trini@ti.com> | 2014-12-08 14:35:44 (GMT) |
commit | f7e517b4ebc199ec90bb56ae4336dbd534ecade5 (patch) | |
tree | 1681209091ad72060ce1071a971454eef1a9eec9 /include/pci_gt64120.h | |
parent | d2ca9fd2cd74e8346827af111ceb249a7fd44637 (diff) | |
download | u-boot-fsl-qoriq-f7e517b4ebc199ec90bb56ae4336dbd534ecade5.tar.xz |
serial: pl01x: disable as per type of pl01x
pl010 & pl011 have different control register offsets, setting it as per
the pl01x type.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/pci_gt64120.h')
0 files changed, 0 insertions, 0 deletions