diff options
| author | Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> | 2014-12-12 14:06:14 (GMT) |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-12-13 22:08:04 (GMT) |
| commit | 54ba653ab63b31c8f5405fb0ee9dfba05cbb1521 (patch) | |
| tree | f25ee08062a2b629296e8bb19ae0461dc7493c76 /include | |
| parent | 74c2cee4e82bb71953267e87900e279ab5aa1dc3 (diff) | |
| download | u-boot-fsl-qoriq-54ba653ab63b31c8f5405fb0ee9dfba05cbb1521.tar.xz | |
sf: Enable byte program support
Enabled byte program support for sst flashes in sf.
Few controllers will only support BP, so this patch gives
a tx transfer flag to set the BP so-that sf will operate
on byte program transfer.
A new TX operation mode SPI_OPM_TX_BP is introduced for such SPI
controller to use byte program op for SST flash.
Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/spi.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/spi.h b/include/spi.h index 5b78271..ec17bd0 100644 --- a/include/spi.h +++ b/include/spi.h @@ -34,6 +34,7 @@ /* SPI TX operation modes */ #define SPI_OPM_TX_QPP (1 << 0) +#define SPI_OPM_TX_BP (1 << 1) /* SPI RX operation modes */ #define SPI_OPM_RX_AS (1 << 0) |