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author | Vladimir Zapolskiy <vz@mleia.com> | 2015-10-04 22:18:45 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2015-10-11 21:12:13 (GMT) |
commit | 4c90234586833c0bb4a5d9d3f69a69c8ab09e01f (patch) | |
tree | 2ac2373905fe23b18d4c4eddc897de6664bc842b /tools/rkimage.c | |
parent | f0aa26f006339969d5e712c50fdb6838333be3b8 (diff) | |
download | u-boot-fsl-qoriq-4c90234586833c0bb4a5d9d3f69a69c8ab09e01f.tar.xz |
lpc32xx: fix calculation of HCLK PLL output clock
Execution branches on feedback mode are swapped, this has no effect
if default direct mode is on (then p_div is equal to 1 and Fout equals
to Fcco), that's why the problem remained unnoticed for a long time.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Diffstat (limited to 'tools/rkimage.c')
0 files changed, 0 insertions, 0 deletions