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-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index c6cf774..7aae397 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -50,6 +50,11 @@ config MAX_CPUS
cores, count the reserved ports. This will allocate enough memory
in spin table to properly handle all cores.
+config NUM_DDR_CONTROLLERS
+ int "Maximum DDR controllers"
+ default 3 if ARCH_LS2080A
+ default 1
+
config SYS_FSL_IFC_BANK_COUNT
int "Maximum banks of Integrated flash controller"
depends on ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A
@@ -57,4 +62,7 @@ config SYS_FSL_IFC_BANK_COUNT
default 4 if ARCH_LS1046A
default 8 if ARCH_LS2080A
+config SYS_FSL_HAS_DP_DDR
+ bool
+
endmenu