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-rw-r--r--board/renesas/sh7757lcr/README.sh7757lcr77
-rw-r--r--board/renesas/sh7785lcr/README.sh7785lcr123
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diff --git a/board/renesas/sh7757lcr/README.sh7757lcr b/board/renesas/sh7757lcr/README.sh7757lcr
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+========================================
+Renesas R0P7757LC0030RL board
+========================================
+
+This board specification:
+=========================
+
+The R0P7757LC0030RL(board config name:sh7757lcr) has the following device:
+
+ - SH7757 (SH-4A)
+ - DDR3-SDRAM 256MB (with ECC)
+ - SPI ROM 8MB
+ - 2D Graphic controller
+ - Ethernet controller
+ - eMMC 2GB
+
+
+configuration for This board:
+=============================
+
+You can select the configuration as follows:
+
+ - make sh7785lcr_config
+
+
+This board specific command:
+============================
+
+This board has the following its specific command:
+
+ - sh_g200
+ - write_mac
+
+
+1. sh_g200
+
+If we run this command, SH4 can control the G200.
+The default setting is that SH4 cannot control the G200.
+
+
+2. write_mac
+
+You can write MAC address to SPI ROM.
+
+ Usage 1) Write MAC address
+
+ write_mac [ETHERC ch0] [ETHERC ch1] [GETHERC ch0] [GETHERC ch1]
+
+ For example)
+ => write_mac 00:00:87:6c:21:80 00:00:87:6c:21:81 00:00:87:6c:21:82 00:00:87:6c:21:83
+ *) We have to input the command as a single line
+ (without carriage return)
+ *) We have to reset after input the command.
+
+ Usage 2) Show current data
+
+ write_mac
+
+ For example)
+ => write_mac
+ ETHERC ch0 = 00:00:87:6c:21:80
+ ETHERC ch1 = 00:00:87:6c:21:81
+ GETHERC ch0 = 00:00:87:6c:21:82
+ GETHERC ch1 = 00:00:87:6c:21:83
+
+
+Update SPI ROM:
+============================
+
+1. Copy u-boot image to RAM area.
+2. Probe SPI device.
+ => sf probe 0
+ 8192 KiB M25P64 at 0:0 is now current device
+3. Erase SPI ROM.
+ => sf erase 0 80000
+4. Write u-boot image to SPI ROM.
+ => sf write 0x89000000 0 80000
diff --git a/board/renesas/sh7785lcr/README.sh7785lcr b/board/renesas/sh7785lcr/README.sh7785lcr
new file mode 100644
index 0000000..56455fc
--- /dev/null
+++ b/board/renesas/sh7785lcr/README.sh7785lcr
@@ -0,0 +1,123 @@
+========================================
+Renesas Technology R0P7785LC0011RL board
+========================================
+
+This board specification:
+=========================
+
+The R0P7785LC0011RL(board config name:sh7785lcr) has the following device:
+
+ - SH7785 (SH-4A)
+ - DDR2-SDRAM 512MB
+ - NOR Flash 64MB
+ - 2D Graphic controller
+ - SATA controller
+ - Ethernet controller
+ - USB host/peripheral controller
+ - SD controller
+ - I2C controller
+ - RTC
+
+This board has 2 physical memory maps. It can be changed with DIP switch(S2-5).
+
+ phys address | S2-5 = OFF | S2-5 = ON
+ -------------------------------+---------------+---------------
+ 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash
+ 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
+ 0x06000000 - 0x07ffffff(CS1) | reserved | I2C
+ 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
+ 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
+ 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
+ 0x14000000 - 0x17ffffff(CS5) | I2C | USB
+ 0x18000000 - 0x1bffffff(CS6) | reserved | SD
+ 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use)
+
+
+configuration for This board:
+=============================
+
+You can choose configuration as follows:
+
+ - make sh7785lcr_config
+ - make sh7785lcr_32bit_config
+
+When you use "make sh7785lcr_config", there is build U-Boot for 29-bit
+address mode. This mode can use 128MB DDR-SDRAM.
+
+When you use "make sh7785lcr_32bit_config", there is build U-Boot for 32-bit
+extended address mode. This mode can use 384MB DDR-SDRAM. And if you run
+"pmb" command, this mode can use 512MB DDR-SDRAM.
+
+ * 32-bit extended address mode PMB mapping *
+ a) on start-up
+ virt | phys | size | device
+ -------------+---------------+---------------+---------------
+ 0x88000000 | 0x48000000 | 384MB | DDR-SDRAM (Cacheable)
+ 0xa0000000 | 0x00000000 | 64MB | NOR Flash
+ 0xa4000000 | 0x04000000 | 16MB | PLD
+ 0xa6000000 | 0x08000000 | 16MB | USB
+ 0xa8000000 | 0x48000000 | 384MB | DDR-SDRAM (Non-cacheable)
+
+ b) after "pmb" command
+ virt | phys | size | device
+ -------------+---------------+---------------+---------------
+ 0x80000000 | 0x40000000 | 512MB | DDR-SDRAM (Cacheable)
+ 0xa0000000 | 0x40000000 | 512MB | DDR-SDRAM (Non-cacheable)
+
+
+This board specific command:
+============================
+
+This board has the following its specific command:
+
+ - hwtest
+ - printmac
+ - setmac
+ - pmb (sh7785lcr_32bit_config only)
+
+
+1. hwtest
+
+This is self-check command. This command has the following options:
+
+ - all : test all hardware
+ - pld : output PLD version
+ - led : turn on LEDs
+ - dipsw : test DIP switch
+ - sm107 : output SM107 version
+ - net : check RTL8110 ID
+ - sata : check SiI3512 ID
+ - net : output PCI slot device ID
+
+i.e)
+=> hwtest led
+turn on LEDs 3, 5, 7, 9
+turn on LEDs 4, 6, 8, 10
+
+=> hwtest net
+Ethernet OK
+
+
+2. printmac
+
+This command outputs MAC address of this board.
+
+i.e)
+=> printmac
+MAC = 00:00:87:**:**:**
+
+
+3. setmac
+
+This command writes MAC address of this board.
+
+i.e)
+=> setmac 00:00:87:**:**:**
+
+
+4. pmb
+
+This command change PMB for DDR-SDRAM all mapping. However you cannot use
+NOR Flash and USB Host on U-Boot when you run this command.
+i.e)
+=> pmb