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-rw-r--r--cpu/ixp/timer.c54
1 files changed, 54 insertions, 0 deletions
diff --git a/cpu/ixp/timer.c b/cpu/ixp/timer.c
index deb227a..6856149 100644
--- a/cpu/ixp/timer.c
+++ b/cpu/ixp/timer.c
@@ -32,6 +32,54 @@
#include <common.h>
#include <asm/arch/ixp425.h>
+#ifdef CONFIG_TIMER_IRQ
+
+#define FREQ 66666666
+#define CLOCK_TICK_RATE (((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ)
+#define LATCH ((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ) /* For divider */
+
+/*
+ * When interrupts are enabled, use timer 2 for time/delay generation...
+ */
+
+static volatile ulong timestamp;
+
+static void timer_isr(void *data)
+{
+ unsigned int *pTime = (unsigned int *)data;
+
+ (*pTime)++;
+
+ /*
+ * Reset IRQ source
+ */
+ *IXP425_OSST = IXP425_OSST_TIMER_2_PEND;
+}
+
+ulong get_timer (ulong base)
+{
+ return timestamp - base;
+}
+
+void reset_timer (void)
+{
+ timestamp = 0;
+}
+
+int timer_init (void)
+{
+ /* install interrupt handler for timer */
+ irq_install_handler(IXP425_TIMER_2_IRQ, timer_isr, (void *)&timestamp);
+
+ /* setup the Timer counter value */
+ *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE;
+
+ /* enable timer irq */
+ *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ);
+
+ return 0;
+}
+#else
ulong get_timer (ulong base)
{
return get_timer_masked () - base;
@@ -79,3 +127,9 @@ ulong get_timer_masked (void)
}
return (reload_constant - current);
}
+
+int timer_init(void)
+{
+ return 0;
+}
+#endif