diff options
Diffstat (limited to 'drivers/ddr/fsl/ctrl_regs.c')
| -rw-r--r-- | drivers/ddr/fsl/ctrl_regs.c | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index c0ee858..6501bb2 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -2097,7 +2097,28 @@ static void set_ddr_dq_mapping(fsl_ddr_cfg_regs_t *ddr, ((dimm_params[i].dq_mapping[2] & 0x3F) << 14) | ((dimm_params[i].dq_mapping[3] & 0x3F) << 8) | ((dimm_params[i].dq_mapping[4] & 0x3F) << 2); - + +#ifdef CONFIG_TARGET_QT1040_4GB +/* DQ mapping on the QT1040_4GB (DDR4) board */ + ddr->dq_map_1 = ((dimm_params[i].dq_mapping[ 5] & 0x3F) << 26) | + ((dimm_params[i].dq_mapping[ 6] & 0x3F) << 20) | + ((dimm_params[i].dq_mapping[ 7] & 0x3F) << 14) | + ((dimm_params[i].dq_mapping[ 8] & 0x3F) << 8) | + ((dimm_params[i].dq_mapping[ 9] & 0x3F) << 2); + + ddr->dq_map_2 = ((dimm_params[i].dq_mapping[10] & 0x3F) << 26) | + ((dimm_params[i].dq_mapping[11] & 0x3F) << 20) | + ((dimm_params[i].dq_mapping[12] & 0x3F) << 14) | + ((dimm_params[i].dq_mapping[13] & 0x3F) << 8) | + ((dimm_params[i].dq_mapping[14] & 0x3F) << 2); + + /* dq_map for ECC[4:7] is set to 0 if accumulated ECC is enabled */ + ddr->dq_map_3 = ((dimm_params[i].dq_mapping[15] & 0x3F) << 26) | + ((dimm_params[i].dq_mapping[16] & 0x3F) << 20) | + (acc_ecc_en ? 0 : + (dimm_params[i].dq_mapping[17] & 0x3F) << 14) | + dimm_params[i].dq_mapping_ors; +#else ddr->dq_map_1 = ((dimm_params[i].dq_mapping[5] & 0x3F) << 26) | ((dimm_params[i].dq_mapping[6] & 0x3F) << 20) | ((dimm_params[i].dq_mapping[7] & 0x3F) << 14) | @@ -2116,7 +2137,7 @@ static void set_ddr_dq_mapping(fsl_ddr_cfg_regs_t *ddr, (acc_ecc_en ? 0 : (dimm_params[i].dq_mapping[9] & 0x3F) << 14) | dimm_params[i].dq_mapping_ors; - +#endif debug("FSLDDR: dq_map_0 = 0x%08x\n", ddr->dq_map_0); debug("FSLDDR: dq_map_1 = 0x%08x\n", ddr->dq_map_1); debug("FSLDDR: dq_map_2 = 0x%08x\n", ddr->dq_map_2); |