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-rw-r--r--include/configs/IceCube.h44
-rw-r--r--include/configs/eXalion.h6
-rw-r--r--include/mpc5xxx.h23
3 files changed, 68 insertions, 5 deletions
diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h
index 1dc9925..1d4daa7 100644
--- a/include/configs/IceCube.h
+++ b/include/configs/IceCube.h
@@ -81,6 +81,10 @@
#endif
+/* Partitions */
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+
/* USB */
#if 1
#define CONFIG_USB_OHCI
@@ -94,8 +98,12 @@
/*
* Supported commands
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | ADD_PCI_CMD | \
- CFG_CMD_I2C | CFG_CMD_EEPROM | \
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_FAT | \
+ CFG_CMD_I2C | \
+ CFG_CMD_IDE | \
+ ADD_PCI_CMD | \
ADD_USB_CMD)
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
@@ -293,4 +301,36 @@
#define CFG_RESET_ADDRESS 0xff000000
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff Supports IDE harddisk
+ *-----------------------------------------------------------------------
+ */
+
+#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+
+#define CONFIG_IDE_RESET /* reset for ide supported */
+#define CONFIG_IDE_PREINIT
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR MPC5XXX_ATA
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET (0x0060)
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET (0x005c)
+
+/* Interval between registers */
+#define CFG_ATA_STRIDE 4
+
#endif /* __CONFIG_H */
diff --git a/include/configs/eXalion.h b/include/configs/eXalion.h
index 5ebc7a9..a014c7c 100644
--- a/include/configs/eXalion.h
+++ b/include/configs/eXalion.h
@@ -50,13 +50,13 @@
#error #### Specific type of MPC824x must be defined (i.e. CONFIG_MPC8240)
#endif
/* older kernels need clock in MHz newer in Hz */
- /* #define CONFIG_CLOCKS_IN_MHZ 1 *//* clocks passsed to Linux in MHz */
+ /* #define CONFIG_CLOCKS_IN_MHZ 1 */ /* clocks passsed to Linux in MHz */
#undef CONFIG_CLOCKS_IN_MHZ
#define CONFIG_BOOTDELAY 10
- /*#define CONFIG_DRAM_SPEED 66 *//* MHz */
+ /*#define CONFIG_DRAM_SPEED 66 */ /* MHz */
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
CFG_CMD_FLASH | \
@@ -230,7 +230,7 @@
#define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
#define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER 2 /* for MPC8240 only */
- /*#define CONFIG_133MHZ_DRAM 1 *//* For 133 MHZ DRAM only !!!!!!!!!!! */
+ /*#define CONFIG_133MHZ_DRAM 1 */ /* For 133 MHZ DRAM only !!!!!!!!!!! */
#if defined (CONFIG_MPC8245)
/* Bit-field values for PMCR2. */
diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h
index 8d4013a..fb0e41a 100644
--- a/include/mpc5xxx.h
+++ b/include/mpc5xxx.h
@@ -89,6 +89,7 @@
#define MPC5XXX_ICTL (CFG_MBAR + 0x0500)
#define MPC5XXX_GPT (CFG_MBAR + 0x0600)
#define MPC5XXX_GPIO (CFG_MBAR + 0x0b00)
+#define MPC5XXX_WU_GPIO (CFG_MBAR + 0x0c00)
#define MPC5XXX_PCI (CFG_MBAR + 0x0d00)
#define MPC5XXX_USB (CFG_MBAR + 0x1000)
#define MPC5XXX_SDMA (CFG_MBAR + 0x1200)
@@ -108,6 +109,7 @@
#endif
#define MPC5XXX_FEC (CFG_MBAR + 0x3000)
+#define MPC5XXX_ATA (CFG_MBAR + 0x3A00)
#define MPC5XXX_I2C1 (CFG_MBAR + 0x3D00)
#define MPC5XXX_I2C2 (CFG_MBAR + 0x3D40)
@@ -163,6 +165,12 @@
/* GPIO registers */
#define MPC5XXX_GPS_PORT_CONFIG (MPC5XXX_GPIO + 0x0000)
+/* WakeUp GPIO registers */
+#define MPC5XXX_WU_GPIO_ENABLE (MPC5XXX_WU_GPIO + 0x0000)
+#define MPC5XXX_WU_GPIO_ODE (MPC5XXX_WU_GPIO + 0x0004)
+#define MPC5XXX_WU_GPIO_DIR (MPC5XXX_WU_GPIO + 0x0008)
+#define MPC5XXX_WU_GPIO_DATA (MPC5XXX_WU_GPIO + 0x000c)
+
/* PCI registers */
#define MPC5XXX_PCI_CMD (MPC5XXX_PCI + 0x04)
#define MPC5XXX_PCI_CFG (MPC5XXX_PCI + 0x0c)
@@ -209,6 +217,12 @@
#define MPC5XXX_GPT0_ENABLE (MPC5XXX_GPT + 0x0)
#define MPC5XXX_GPT0_COUNTER (MPC5XXX_GPT + 0x4)
+/* ATA registers */
+#define MPC5XXX_ATA_HOST_CONFIG (MPC5XXX_ATA + 0x0000)
+#define MPC5XXX_ATA_PIO1 (MPC5XXX_ATA + 0x0008)
+#define MPC5XXX_ATA_PIO2 (MPC5XXX_ATA + 0x000C)
+#define MPC5XXX_ATA_SHARE_COUNT (MPC5XXX_ATA + 0x002C)
+
/* I2Cn control register bits */
#define I2C_EN 0x80
#define I2C_IEN 0x40
@@ -287,6 +301,15 @@
#define PSC_MODE_ONE_STOP 0x07
#define PSC_MODE_TWO_STOP 0x0f
+/* ATA config fields */
+#define MPC5xxx_ATA_HOSTCONF_SMR 0x80000000UL /* State machine
+ reset */
+#define MPC5xxx_ATA_HOSTCONF_FR 0x40000000UL /* FIFO Reset */
+#define MPC5xxx_ATA_HOSTCONF_IE 0x02000000UL /* Enable interrupt
+ in PIO */
+#define MPC5xxx_ATA_HOSTCONF_IORDY 0x01000000UL /* Drive supports
+ IORDY protocol */
+
#ifndef __ASSEMBLY__
struct mpc5xxx_psc {
volatile u8 mode; /* PSC + 0x00 */