index
:
u-boot-fsl-qoriq
master
scalys
Freescale u-boot tree with Scalys patches
www-data
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
ddr
Age
Commit message (
Expand
)
Author
2016-04-20
ddr: altera: Repair DQ window centering code
Marek Vasut
2016-04-20
ddr: altera: Staticize global variables
Marek Vasut
2016-04-20
ddr: altera: Make DLEVEL behavior inclusive
Marek Vasut
2016-04-20
ddr: altera: Zero DM IN delay in scc_mgr_zero_group()
Marek Vasut
2016-04-20
ddr: altera: Remove unnecessary ODT mode config
Marek Vasut
2016-04-20
ddr: altera: Remove unnecessary update of the SCC
Marek Vasut
2016-04-20
ddr: altera: Fix DRAM end value in protection rule
Marek Vasut
2016-04-20
ddr: altera: Fix scc_mgr_set() argument order
Marek Vasut
2016-04-20
ddr: altera: Tweak DQS tracking enable handling
Marek Vasut
2016-04-20
ddr: altera: Replace ad-hoc constant with macro
Marek Vasut
2016-03-27
Fix typo choosen in comments and printf logs
Alexander Merkle
2016-03-24
arm: mvebu: Fix ddr3_init() cpu config
Dirk Eibach
2016-03-21
driver/ddr/fsl: Add workaround for erratum A-009803
Shengzhou Liu
2016-03-21
driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discrete
Shengzhou Liu
2016-02-06
Use correct spelling of "U-Boot"
Bin Meng
2016-02-01
drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.
Purna Chandra Mandal
2016-01-25
drivers/ddr/fsl: fsl_ddr_sdram_size remove unused controllers
Ed Swarthout
2016-01-25
driver/ddr/fsl: Add workaround for A009663
Shengzhou Liu
2016-01-25
fsl/ddr: Add workaround for ERRATUM_A009942
Shengzhou Liu
2016-01-19
Add more SPDX-License-Identifier tags
Tom Rini
2016-01-16
ddr: altera: Init the rule ID in debug code
Marek Vasut
2016-01-14
mvebu: axp: Rename MV_DDR_32BIT to CONFIG_DDR_32BIT
Phil Sutter
2016-01-14
axp: Fix debugging support in DDR3 write leveling
Phil Sutter
2016-01-14
arm: mvebu: Make ECC support configurable on Armada XP
Stefan Roese
2016-01-14
arm: mvebu: ddr: Fix compilation warning
Stefan Roese
2015-12-15
move erratum a008336 and a008514 to soc specific file
Yao Yuan
2015-12-14
fsl/ddr: updated ddr errata-A008378 for arm and power SoCs
Shengzhou Liu
2015-12-14
driver/ddr/fsl: Update timing config for heavy load
York Sun
2015-12-14
driver/ddr/fsl: Update workaround for A008511 for vref range
York Sun
2015-12-14
driver/ddr/fsl: Update MR5 RTT park
York Sun
2015-12-14
driver/ddr/fsl: Update DDR4 MR6 for Vref range
York Sun
2015-12-14
driver/ddr/fsl: Update DDR4 RTT values
York Sun
2015-11-30
drivers/ddr/fsl: Fix typo in BIST test for DDR4
York Sun
2015-11-30
drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3
York Sun
2015-11-30
armv8: ls2085a: Add support of LS2085A SoC
Prabhakar Kushwaha
2015-11-30
armv8: LS2080A: Rename LS2085A to reflect LS2080A
Prabhakar Kushwaha
2015-11-17
arm: mvebu: Fix SAR1_CPU_CORE_MASK
Dirk Eibach
2015-11-17
arm: mvebu: a38x: Remove unsupported topologies
Kevin Smith
2015-11-10
Various Makefiles: Add SPDX-License-Identifier tags
Tom Rini
2015-10-30
drivers/ddr/fsl_ddr: Make SR_IE configurable
Joakim Tjernlund
2015-09-11
bitops: introduce BIT() definition
Heiko Schocher
2015-08-23
ddr: altera: Repair uninited variable
Marek Vasut
2015-08-23
ddr: altera: Replace float multiplication with integer one
Marek Vasut
2015-08-17
arm: mvebu: Add complete SDRAM ECC scrubbing
Stefan Roese
2015-08-17
arm: mvebu: sdram: Enable ECC support on Armada XP
Stefan Roese
2015-08-08
ddr: altera: sequencer: Clean checkpatch issues
Marek Vasut
2015-08-08
ddr: altera: sequencer: Clean data types
Marek Vasut
2015-08-08
ddr: altera: sequencer: Pluck out misc macros from code
Marek Vasut
2015-08-08
ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VAL
Marek Vasut
2015-08-08
ddr: altera: sequencer: Zap VFIFO_SIZE
Marek Vasut
[next]