diff options
| author | Alex Porosanu <alexandru.porosanu@freescale.com> | 2013-01-29 16:45:50 (GMT) |
|---|---|---|
| committer | Emil Medve <Emilian.Medve@Freescale.com> | 2013-04-02 09:48:03 (GMT) |
| commit | c0968ee93056fcbaec2235642ab0de9b221df916 (patch) | |
| tree | 9c4302e65da30c26ccc4d631fa200b6426dd768b /drivers/crypto/caam/regs.h | |
| parent | 62e653aa1e47b47033604d36755971ae17a773f8 (diff) | |
| download | linux-fsl-qoriq-c0968ee93056fcbaec2235642ab0de9b221df916.tar.xz | |
crypto: caam - support for RNG version retrieval
This patch adds support for retrieving the version of the RNG
block inside the SEC. This is done by retrieving the corresponding
value from the the CHAVID register.
Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
(cherry picked from commit b7319875be0ec106708aade88a9578c75bdfe8b3)
Change-Id: I4847b0f32bab6397551a2a1b01bd4edcedcaf9a3
Reviewed-on: http://git.am.freescale.net:8181/522
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Diffstat (limited to 'drivers/crypto/caam/regs.h')
| -rw-r--r-- | drivers/crypto/caam/regs.h | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h index cd6feda..eae76f5 100644 --- a/drivers/crypto/caam/regs.h +++ b/drivers/crypto/caam/regs.h @@ -117,6 +117,43 @@ struct jr_outentry { #define CHA_NUM_DECONUM_SHIFT 56 #define CHA_NUM_DECONUM_MASK (0xfull << CHA_NUM_DECONUM_SHIFT) +/* CHA Version IDs */ +#define CHA_ID_AES_SHIFT 0 +#define CHA_ID_AES_MASK (0xfull << CHA_ID_AES_SHIFT) + +#define CHA_ID_DES_SHIFT 4 +#define CHA_ID_DES_MASK (0xfull << CHA_ID_DES_SHIFT) + +#define CHA_ID_ARC4_SHIFT 8 +#define CHA_ID_ARC4_MASK (0xfull << CHA_ID_ARC4_SHIFT) + +#define CHA_ID_MD_SHIFT 12 +#define CHA_ID_MD_MASK (0xfull << CHA_ID_MD_SHIFT) + +#define CHA_ID_RNG_SHIFT 16 +#define CHA_ID_RNG_MASK (0xfull << CHA_ID_RNG_SHIFT) + +#define CHA_ID_SNW8_SHIFT 20 +#define CHA_ID_SNW8_MASK (0xfull << CHA_ID_SNW8_SHIFT) + +#define CHA_ID_KAS_SHIFT 24 +#define CHA_ID_KAS_MASK (0xfull << CHA_ID_KAS_SHIFT) + +#define CHA_ID_PK_SHIFT 28 +#define CHA_ID_PK_MASK (0xfull << CHA_ID_PK_SHIFT) + +#define CHA_ID_CRC_SHIFT 32 +#define CHA_ID_CRC_MASK (0xfull << CHA_ID_CRC_SHIFT) + +#define CHA_ID_SNW9_SHIFT 36 +#define CHA_ID_SNW9_MASK (0xfull << CHA_ID_SNW9_SHIFT) + +#define CHA_ID_DECO_SHIFT 56 +#define CHA_ID_DECO_MASK (0xfull << CHA_ID_DECO_SHIFT) + +#define CHA_ID_JR_SHIFT 60 +#define CHA_ID_JR_MASK (0xfull << CHA_ID_JR_SHIFT) + struct sec_vid { u16 ip_id; u8 maj_rev; |