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author | Wang Dongsheng <dongsheng.wang@freescale.com> | 2014-04-29 02:17:00 (GMT) |
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committer | Jose Rivera <German.Rivera@freescale.com> | 2014-04-29 18:23:30 (GMT) |
commit | 48e5d93779618eedc2409c16de7280677f6eaa5e (patch) | |
tree | f3fc3c8cd7547eb11489027a5e16eb06fdcfbadf /Documentation | |
parent | 705aa98535fecbc116d02ae6a2d5819fc36c1f7e (diff) | |
download | linux-fsl-qoriq-48e5d93779618eedc2409c16de7280677f6eaa5e.tar.xz |
Revert "Make the diu driver work without board level initialization"
This reverts commit cf42c0223c36e5fc2bc99ac01a7dec2ba5ccfec6.
This patch is a old methods, and platform operation shouldn't in
driver code. The patch has been replaced by the new patch. And for
binding also not need to modify.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Change-Id: I5abf5c05400082b18822bcdd03117b7698ec859c
Reviewed-on: http://git.am.freescale.net:8181/11644
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/powerpc/fsl/diu.txt | 16 |
1 files changed, 1 insertions, 15 deletions
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/diu.txt b/Documentation/devicetree/bindings/powerpc/fsl/diu.txt index fa902c8..b66cb6d 100644 --- a/Documentation/devicetree/bindings/powerpc/fsl/diu.txt +++ b/Documentation/devicetree/bindings/powerpc/fsl/diu.txt @@ -6,11 +6,7 @@ drive DVI monitors. Required properties: - compatible : should be "fsl,diu" or "fsl,mpc5121-diu". - reg : should contain at least address and length of the DIU register - set. The address and length for pixel clock register is optional, it's - not needed for the platforms with the pixel clock setting function, such - as P1022, MPC8610, MPC5121; for the platform without clock setting function, - the pixel clock register and settings in 'pixclk' node work together to - provide the pixel clock setting in the diu driver. + set. - interrupts : one DIU interrupt should be described here. - interrupt-parent : the phandle for the interrupt controller that services interrupts for this device. @@ -19,8 +15,6 @@ Optional properties: - edid : verbatim EDID data block describing attached display. Data from the detailed timing descriptor will be used to program the display controller. -- pixclk : the pixel clock register setting, includeing PXCKDLYDIR, PXCK - and PXCKDLY. Example (MPC8610HPCD): display@2c000 { @@ -38,11 +32,3 @@ Example for MPC5121: interrupt-parent = <&ipic>; edid = [edid-data]; }; - -Example for T1040: - display:display@180000 { - compatible = "fsl,t1040-diu", "fsl,diu"; - reg = <0x180000 1000 0xfc028 4>; - pixclk = <0 255 0>; - interrupts = <74 2 0 0>; - }; |